mc56f8006 Freescale Semiconductor, Inc, mc56f8006 Datasheet - Page 16
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mc56f8006
Manufacturer Part Number
mc56f8006
Description
Digital Signal Controller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F8006.pdf
(100 pages)
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Signal/Connection Descriptions
4.3
After reset, each pin is configured for its primary function (listed first). Any alternate functionality must be programmed via the
GPIO module’s peripheral enable registers (GPIO_x_PER) and SIM module’s (GPS_xn) GPIO peripheral select registers. If
CLKIN or XTAL is selected as device external clock input, the CLK_MOD bit in the OCCS oscillator control register (OSCTL)
needs to be set too. EXT_SEL bit in OSCTL selects CLKIN or XTAL.
16
GPIOB6/RXD/SDA/ANA13 & CMP0_P2/CLKIN
ANB8 and PGA1+ & CMP0_M2/GPIOC4
ANB6 and PGA1– & CMP0_P4/GPIOC5
GPIOB7/TXD/SCL/ANA11 & CMP2_M3
GPIOB1/SS/SDA/ANA12 & CMP2_P3
ANB4 & CMP1_P1/GPIOC6/PWM2
56F8006/56F8002 Signal Pins
GPIOC7/ANB5 & CMP1_M2
GPIOE2/ANB7 & CMP0_M1
GPIOE1/ANB9 & CMP0_P1
GPIOB5/T1/FAULT3/SCLK
Figure 6. Top View, MC56F8006 48-Pin LQFP Package
GPIOE0
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 2
V
DDA
1
2
3
4
5
6
7
8
9
10
11
12
Orientation Mark
36
35
34
33
32
31
30
29
28
27
26
25
GPIOA3/PWM3/TXD/EXTAL
GPIOA2/PWM2
GPIOA4/PWM4/SDA/FAULT1/TIN2
GPIOB0/SCLK/SCL/ANB13/PWM3/T1
GPIOE6
GPIOB4/T0/CLKO_0/MISO/SDA/RXD/ANA0 & ANB0
GPIOE7/CMP1_M3
V
GPIOA5/PWM5/FAULT2 or EXT_SYNC/TIN3
Vss
GPIOA6/FAULT0/ANA1 & ANB1/SCL/TXD/CLKO_1
GPIOB2/MISO/TIN2/ANA2 & ANB2/CMP0_OUT
DD
Freescale Semiconductor