cop8cce9imt9 National Semiconductor Corporation, cop8cce9imt9 Datasheet - Page 26

• Manufacturer Part Number: cop8cce9imt9
• Description: 8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom, 10-bit A/d And Brownout Reset
• Manufacturer: National Semiconductor Corporation

www.national.com
10.0 Functional Description
10.8.2 Clock Doubler
This device contains a frequency doubler that doubles the
frequency of the oscillator selected to operate the main
microcontroller core. The details of how to select either the
high speed oscillator or low speed oscillator are described in,
Power Saving Features. When the high speed oscillator
connected to CKI operates at 10 MHz, the internal clock
frequency is 20 MHz, resulting in an instruction cycle time of
0.5 µs. When the 32 kHz oscillator connected to L0 and L1 is
selected, the internal clock frequency is 64 kHz, resulting in
an instruction cycle of 152.6 µs. The output of the clock
doubler is called MCLK and is referenced in many places
within this document.
10.9 CONTROL REGISTERS
10.9.1 CNTRL Register (Address X'00EE)
The Timer1 (T1) and MICROWIRE/PLUS control register
contains the following bits:
10.9.2 PSW Register (Address X'00EF)
The PSW register contains the following select bits:
The Half-Carry flag is also affected by all the instructions that
affect the Carry flag. The SC (Set Carry) and R/C (Reset
Carry) instructions will respectively set or clear both the carry
flags. In addition to the SC and R/C instructions, ADC,
SUBC, RRC and RLC instructions affect the Carry and Half
Carry flags.
Bit 7
(Continued)
T1C3
T1C3
T1C2
T1C1
T1C0
MSEL
IEDG
SL1 & SL0 Select the MICROWIRE/PLUS clock divide
Bit 7
HC
C
T1PNDA Timer T1 Interrupt Pending Flag (Autoreload RA
T1ENA
EXPND
BUSY
EXEN
GIE
HC
T1C2
C
Half Carry Flag
Carry Flag
in mode 1, T1 Underflow in Mode 2, T1A capture
edge in mode 3)
Timer T1 Interrupt Enable for Timer Underflow
or T1A Input capture edge
External interrupt pending
MICROWIRE/PLUS busy shifting flag
Enable external interrupt
Global interrupt enable (enables interrupts)
T1PNDA
Timer T1 mode control bit
Timer T1 mode control bit
Timer T1 mode control bit
Timer
modes 1 and 2. T1 Underflow Interrupt
Pending Flag in timer mode 3
Selects G5 and G4 as MICROWIRE/PLUS
signals SK and SO respectively
External
(0 = Rising edge, 1 = Falling edge)
by (00 = 2, 01 = 4, 1x = 8)
T1C1
T1ENA
T1C0
T1
interrupt
Start/Stop
MSEL
EXPND
edge
IEDG
BUSY
control
polarity
SL1
EXEN
in
select
SL0
timer
Bit 0
GIE
Bit 0
26
10.9.3 ICNTRL Register (Address X'00E8)
The ICNTRL register contains the following bits:
10.9.4 T2CNTRL Register (Address X'00C6)
The T2CNTRL register contains the following bits:
10.9.5 HSTCR Register (Address X'00AF)
The HSTCR register contains the following bits:
10.9.6 ITMR Register (Address X'00CF)
The ITMR register contains the following bits:
Bit 7
Bit 7
Bit 7
Bit 7
Unused
LSON
T2C3
LPEN
T0PND
T0EN
µWPND MICROWIRE/PLUS interrupt pending
µWEN
T1PNDB Timer T1 Interrupt Pending Flag for T1B capture
T1ENB
T2C3
T2C2
T2C1
T2C0
T2PNDA Timer T2 Interrupt Pending Flag (Autoreload
T2ENA
T2PNDB Timer T2 Interrupt Pending Flag for T2B cap-
T2ENB
T2HS Places Timer T2 in High Speed Mode.
LSON
HSON
DCEN
CCKSEL Selects the high speed oscillator or the low
RSVD
ITSEL2
ITSEL1
ITSEL0
HSON
T2C2
LPEN
L
Wake-up/Interrupt)
Timer T0 Interrupt pending
Timer T0 Interrupt Enable (Bit 12 toggle)
Enable MICROWIRE/PLUS interrupt
edge
Timer T1 Interrupt Enable for T1B Input capture
edge
Turns the low speed oscillator on or off.
Turns the high speed oscillator on or off.
Selects the high speed oscillator or the low
speed oscillator as the Idle Timer Clock.
speed oscillator as the primary CPU clock.
This bit is reserved and must be 0.
Idle Timer period select bit.
Idle Timer period select bit.
Idle Timer period select bit.
Timer T2 mode control bit
Timer T2 mode control bit
Timer T2 mode control bit
Timer
modes 1 and 2, Timer T2 Underflow Interrupt
Pending Flag in timer mode 3
RA in mode 1, T2 Underflow in mode 2, T2A
capture edge in mode 3)
Timer T2 Interrupt Enable for Timer Underflow
or T2A Input capture edge
ture edge
Timer T2 Interrupt Enable for T2B Input capture
edge
DCEN
T2C1
T0PND
Port
T2
CCKS
T2C0
Reserved
EL
T0EN
Interrupt
Start/Stop
T2PNDA
µWPND
RSVD
µWEN
Enable
T2ENA
ITSEL2
control
T1PNDB
T2PNDB
ITSEL1
(Multi-Input
in
T1ENB
T2ENB
ITSEL0
T2HS
timer
Bit 0
Bit 0
Bit 0
Bit 0