cop8cce9imt9 National Semiconductor Corporation, cop8cce9imt9 Datasheet - Page 65

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cop8cce9imt9

Manufacturer Part Number
cop8cce9imt9
Description
8-bit Cmos Flash Microcontroller With 8k Memory, Virtual Eeprom, 10-bit A/d And Brownout Reset
Manufacturer
National Semiconductor Corporation
Datasheet
18.0 MICROWIRE/PLUS
19.0 Memory Map
All RAM, ports and registers (except A and PC) are mapped
into data memory address space.
0000 to 006F
0070 to 007F
xx80 to xx8F
xx90 to xx9F
xxA0
xxA1
xxA2
xxA3
xxA4
xxA5
xxA6
xxA7
xxA8
xxA9
xxAA
xxAB
xxAC
S/ADD REG
Address
FIGURE 36. MICROWIRE/PLUS SPI Mode Interface Timing, Alternate SK Mode, SK Idle Phase being High
FIGURE 35. MICROWIRE/PLUS SPI Mode Interface Timing, Normal SK Mode, SK Idle Phase being High
On-Chip RAM bytes (112 bytes)
Unused RAM Address Space (Reads As
All Ones)
Unused RAM Address Space (Reads
Undefined Data)
Reserved
Port A Data Register
Port A Configuration Register
Port A Input Pins (Read Only)
Reserved for Port A
Port B Data Register
Port B Configuration Register
Port B Input Pins (Read Only)
Reserved for Port B
ISP Address Register Low Byte
(ISPADLO)
ISP Address Register High Byte
(ISPADHI)
ISP Read Data Register (ISPRD)
ISP Write Data Register (ISPWR)
Reserved
Contents
(Continued)
65
xxAD
xxAE
xxAF
xxB0 to xxB7
xxB8
xxB9
xxBA
xxBB
xxBC
xxBD
xxBE
xxBF
xxC0
xxC1
xxC2
xxC3
xxC4
S/ADD REG
Address
Reserved
Reserved
High Speed Timers Control Register
(HSTCR)
Reserved
USART Transmit Buffer (TBUF)
USART Receive Buffer (RBUF)
USART Control and Status Register
(ENU)
USART Receive Control and Status
Register (ENUR)
USART Interrupt and Clock Source
Register (ENUI)
USART Baud Register (BAUD)
USART Prescale Select Register (PSR)
Reserved for USART
Timer T2 Lower Byte
Timer T2 Upper Byte
Timer T2 Autoload Register T2RA Lower
Byte
Timer T2 Autoload Register T2RA Upper
Byte
Timer T2 Autoload Register T2RB Lower
Byte
Contents
20022538
20022539
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