cop8tab5 National Semiconductor Corporation, cop8tab5 Datasheet - Page 2
cop8tab5
Manufacturer Part Number
cop8tab5
Description
8-bit Cmos Rom Microcontroller With 2k Or 4k Memory
Manufacturer
National Semiconductor Corporation
Datasheet
1.COP8TAB5.pdf
(54 pages)
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3.0 Block Diagram
4.0 Ordering Information
NOTE: The user, utilizing the COP8TAx9 Flash based de-
vices during development, is cautioned to ensure that code
contains NO calls to Boot ROM functions prior to submission
for ROM generation. Instances of the JSRB instruction in
ROM based devices will be executed as a JSR instruction to
a location in the first 256 bytes of Program Memory.
Flash and ROM devices are not 100% identical. The execu-
tion of the JSRB instruction is an example of the potential
COP8
Feature Set
Family and
Indicator
TA
B = 2k
C = 4k
Program
Memory
Size
C
5 = Masked ROM
9 = Flash
Part Numbering Scheme
Program
Memory
Type
5
2
C = 20 Pin
E = 28 Pin
H = 44 Pin
differences between the devices. For this reason, the user is
strongly advised to obtain masked ROM prototype devices
before committing to production quantities. This will allow the
user to ensure there are no unexpected differences between
Flash and ROM devices within the application.
No. Of Pins
H
LQ = LLP
MW = SOIC WIDE
Package
Type
LQ
8 = -40 to +85˚C
20091701
Temperature
8
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