cop8tab5 National Semiconductor Corporation, cop8tab5 Datasheet - Page 3

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cop8tab5

Manufacturer Part Number
cop8tab5
Description
8-bit Cmos Rom Microcontroller With 2k Or 4k Memory
Manufacturer
National Semiconductor Corporation
Datasheet
1.0 General Description ..................................................................................................................................... 1
2.0 Features ....................................................................................................................................................... 1
3.0 Block Diagram .............................................................................................................................................. 2
4.0 Ordering Information .................................................................................................................................... 2
5.0 Connection Diagrams ................................................................................................................................... 5
6.0 Architectural Overview ................................................................................................................................. 7
7.0 Absolute Maximum Ratings ......................................................................................................................... 8
8.0 Electrical Characteristics .............................................................................................................................. 8
9.0 Pin Descriptions ......................................................................................................................................... 11
10.0 Functional Description .............................................................................................................................. 13
11.0 Timers ....................................................................................................................................................... 18
12.0 Power Save Modes .................................................................................................................................. 22
13.0 Interrupts .................................................................................................................................................. 25
14.0 WATCHDOG/Clock Monitor ..................................................................................................................... 31
6.1 EMI REDUCTION ...................................................................................................................................... 7
6.2 ARCHITECTURE
6.3 INSTRUCTION SET ................................................................................................................................. 7
6.4 PACKAGING/PIN EFFICIENCY ................................................................................................................ 7
10.1 CPU REGISTERS ................................................................................................................................. 13
10.2 PROGRAM MEMORY ........................................................................................................................... 14
10.3 DATA MEMORY .................................................................................................................................... 14
10.4 OPTION REGISTER ............................................................................................................................. 14
10.5 RESET ................................................................................................................................................... 15
10.6 OSCILLATOR CIRCUITS ...................................................................................................................... 16
10.7 CONTROL REGISTERS ....................................................................................................................... 18
11.1 TIMER T0 (IDLE TIMER) ....................................................................................................................... 18
11.2 TIMER T1 .............................................................................................................................................. 19
11.3 MODE 1. PROCESSOR INDEPENDENT PWM MODE ....................................................................... 19
11.4 MODE 2. EXTERNAL EVENT COUNTER MODE ................................................................................ 19
11.5 MODE 3. INPUT CAPTURE MODE ...................................................................................................... 21
11.6 TIMER CONTROL FLAGS .................................................................................................................... 22
12.1 HALT MODE .......................................................................................................................................... 22
12.2 IDLE MODE ........................................................................................................................................... 23
12.3 MULTI-INPUT WAKE-UP ...................................................................................................................... 24
13.1 INTRODUCTION ................................................................................................................................... 25
13.2 MASKABLE INTERRUPTS ................................................................................................................... 26
13.3 VIS INSTRUCTION ............................................................................................................................... 27
13.4 NON-MASKABLE INTERRUPT ............................................................................................................ 29
13.5 PORT C AND PORT L INTERRUPTS .................................................................................................. 31
13.6 INTERRUPT SUMMARY ....................................................................................................................... 31
14.1 CLOCK MONITOR ................................................................................................................................ 32
14.2 WATCHDOG/CLOCK MONITOR OPERATION .................................................................................... 32
6.3.1 Key Instruction Set Features ............................................................................................................... 7
6.3.2 Single Byte/Single Cycle Code Execution
6.3.3 Many Single-Byte, Multi-Function Instructions .................................................................................... 7
6.3.4 Bit-Level Control .................................................................................................................................. 7
6.3.5 Register Set ......................................................................................................................................... 7
10.5.1 External Reset ................................................................................................................................. 15
10.5.2 On-Chip Power-On Reset ................................................................................................................ 15
10.6.1 Crystal Oscillator .............................................................................................................................. 16
10.6.2 R/C Oscillator ................................................................................................................................... 16
10.6.3 External Oscillator ............................................................................................................................ 17
10.6.4 Clock Prescaler ................................................................................................................................ 17
10.7.1 CNTRL Register (Address X'00EE) ................................................................................................. 18
10.7.2 PSW Register (Address X'00EF) ..................................................................................................... 18
10.7.3 ICNTRL Register (Address X'00E8) ................................................................................................ 18
10.7.4 ITMR Register (Address X'00CF) .................................................................................................... 18
11.1.1 ITMR Register .................................................................................................................................. 19
13.3.1 VIS Execution .................................................................................................................................. 28
13.4.1 Pending Flag .................................................................................................................................... 29
13.4.2 Software Trap .................................................................................................................................. 29
13.4.2.1 Programming Example: External Interrupt ................................................................................. 30
..................................................................................................................................... 7
Table of Contents
......................................................................................... 7
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