msp430f2121irge Microchip Technology Inc., msp430f2121irge Datasheet - Page 4

• Manufacturer Part Number: msp430f2121irge
• Description: Msp430
• Manufacturer: Microchip Technology Inc.

MSP430x21x1
MIXED SIGNAL MICROCONTROLLER
SLAS439C − SEPTEMBER 2004 − REVISED JULY 2006
short-form description
CPU
instruction set
4
The MSP430 CPU has a 16-bit RISC architecture
that is highly transparent to the application. All
operations, other than program-flow instructions,
are
conjunction with seven addressing modes for
source operand and four addressing modes for
destination operand.
The CPU is integrated with 16 registers that
provide reduced instruction execution time. The
register-to-register operation execution time is
one cycle of the CPU clock.
Four of the registers, R0 to R3, are dedicated as
program counter, stack pointer, status register,
and
remaining
registers.
Peripherals are connected to the CPU using data,
address, and control buses, and can be handled
with all instructions.
The instruction set consists of 51 instructions with
three formats and seven address modes. Each
instruction can operate on word and byte data.
Table 1 shows examples of the three types of
instruction formats; the address modes are listed
in Table 2.
NOTE: S = source
Dual operands, source-destination
Single operands, destination only
Relative jump, un/conditional
Symbolic (PC relative)
ADDRESS MODE
performed
constant
autoincrement
Immediate
Absolute
Register
Indexed
Indirect
Indirect
registers
generator
as
D = destination
register
S D
F F
F F
F F
F F
F
F
F
are
respectively.
MOV &MEM,&TCDAT
Table 2. Address Mode Descriptions
general-purpose
MOV X(Rn),Y(Rm)
MOV @Rn,Y(Rm)
Table 1. Instruction Word Formats
POST OFFICE BOX 655303
operations
MOV EDE,TONI
MOV @Rn+,Rm
MOV #X,TONI
MOV Rs,Rd
SYNTAX
The
e.g. ADD R4,R5
e.g. CALL
e.g. JNE
in
•
DALLAS, TEXAS 75265
MOV @R10,Tab(R6)
MOV @R10+,R11
MOV 2(R5),6(R6)
MOV #45,TONI
MOV R10,R11
R8
EXAMPLE
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
General-Purpose Register
R4 + R5 −−−> R5
PC −−>(TOS), R8−−> PC
Jump-on-equal bit = 0
Constant Generator
Program Counter
Status Register
Stack Pointer
M(MEM) −−> M(TCDAT)
M(R10) −−> M(Tab+R6)
M(2+R5)−−> M(6+R6)
M(EDE) −−> M(TONI)
#45
M(R10) −−> R11
R10 + 2−−> R10
R10
OPERATION
−−> M(TONI)
−−> R11
PC/R0
SP/R1
SR/CG1/R2
CG2/R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15