xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 100

• Manufacturer Part Number: xrt94l33
• Description: Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
• Manufacturer: Exar Corporation

XRT94L33
Rev.1.2.0.
AG4
AD9
AG5
AE7
AF5
AF8
RXPOHFRAME
RXPOHVALID
RXPOHCLK
RxPOH_0
RxPOH_1
RxPOH_2
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
O
O
O
O
CMOS
CMOS
CMOS
CMOS
Receive AU-4/VC-4/STS-3c Mapper POH Processor Block –
Path Overhead Output Port – Clock Output Signal:
This output pin, along with “RxPOH”, “RxPOHFrame” and
“RxPOHValid” function as the “AU-4/VC-4 Mapper POH Processor
block – POH Output Port.
These output pins function as the “Clock Output” signals for the
“AU-4/VC-4 Mapper POH Processor Block– POH Output Port. The
“RxPOH”, “RxPOHFrame” and “RxPOHValid” output pins are
updated upon the falling edge of this clock signal.
consequence, the external circuitry should sample these signals
upon the rising edge of this clock signal.
Receive AU-4/VC-4/STS-3c Mapper POH Processor Block –
Path Overhead Output Port – Frame Boundary Indicator:
These output pins, along with the “RxPOH”, RxPOHClk” and
“RxPOHValid” output pins function as the “AU-4/VC-4 Mapper POH
Processor Block – Path Overhead Output Port.
These output pins will pulse “high” coincident with the very first
POH byte (J1), of a given STS-1 frame, is being output via the
corresponding “RxPOH” output pin.
Receive AU-4/VC-4/STS-3c Mapper POH Processor Block –
Path Overhead Output Port – Valid POH Data Indicator:
These output pins, along with “RxPOH”, “RxPOHClk” and
“RxPOHFrame” function as the “AU-4/VC-4 Mapper POH
Processor block – Path Overhead Output port.
These output pins will toggle “high” coincident with when valid POH
data is being output via the “RxPOH” output pins. This output is
updated upon the falling edge of RxPOHClk.
circuitry should sample these signals upon rising edge of
“RxPOHClk”.
Receive SONET POH Processor Block – Path Overhead
Output Port – Output Pin:
These
“RxPOHFrame_n” and “RxPOHValid_n” function as the “Receive
SONET POH Processor block – POH Output port.
These pins serially output the POH data that have been received
by each of the Receive SONET POH Processor blocks (via the
“incoming” STS-3 data-stream). Each bit, within the POH bytes is
updated (via these output pins) upon the falling edge of
“RxPOHClk_n”. As a consequence, external circuitry receiving this
data, should sample this data upon the rising edge of
“RxPOHClk_n”.
100
output
pins,
along
with
the
xr
Hence, external
“RxPOHClk_n”,
As a