xrt94l33 Exar Corporation, xrt94l33 Datasheet - Page 381

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xrt94l33

Manufacturer Part Number
xrt94l33
Description
Multi-channel, Multi-function Device Aggregates 3 Ds3/e3/sts-1 Into Oc3/stm-1
Manufacturer
Exar Corporation
Datasheet

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xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
Receive STS-3 Transport – Receive SF Burst Error Tolerance – Byte 1 (Address = 0x1156)
Receive STS-3 Transport – Receive SF Burst Error Tolerance – Byte 0 (Address = 0x1157)
Additionally, now suppose that the user writes in the value “0x000010” into the “Receive STS-3 Transport –
Receive SF Set Monitor Interval” Register, as depicted below.
Receive STS-3 Transport – Receive SF Set Monitor Interval – Byte 2 (Address = 0x1131)
Receive STS-3 Transport – Receive SF Set Monitor Interval – Byte 1 (Address = 0x1132)
Receive STS-3 Transport – Receive SF Set Monitor Interval – Byte 0 (Address = 0x1133)
Once the user has executed these two steps, then the “SF Declaration Criteria” (for the SF Burst Detector)
will be as summarized below.
• B2 Error Threshold = 0x0F (or 15) B2 Errors.
• SF Set Interval = 0x10 (or 16 SONET frame periods)
Hence, the Receive STS-3 TOH Processor block will accumulate B2 errors over 16 SONET frame periods.
At this point, the Receive STS-3 TOH Processor block will proceed to count B2 errors. Anytime the Receive
STS-3 TOH Processor block detects 15 or more B2 errors, within a 2ms period (e.g., 16 SONET frame
periods); then it will declare the SF condition.
B
B
B
R/W
R/W
R/W
Bit 7
R/W
Bit 7
R/W
IT
IT
IT
0
0
0
0
0
7
7
7
B
B
B
Bit 6
Bit 6
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
0
0
0
0
0
6
6
6
B
B
B
R/W
R/W
R/W
Bit 5
R/W
Bit 5
R/W
IT
IT
IT
0
0
0
0
0
5
5
5
SF_SET_MONITOR_WINDOW[23:16]
SF_SET_MONITOR_WINDOW[15:8]
SF_SET_MONITOR_WINDOW[7:0]
SF_BURST_TOLERANCE[15:8]
SF_BURST_TOLERANCE[7:0]
B
B
B
R/W
R/W
R/W
Bit 4
R/W
Bit 4
R/W
IT
IT
IT
0
0
0
0
1
4
4
4
381
B
B
B
Bit 3
Bit 3
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
0
1
0
0
0
3
3
3
B
B
B
R/W
R/W
R/W
Bit 2
R/W
Bit 2
R/W
IT
IT
IT
0
1
0
0
0
2
2
2
B
B
B
Bit 1
Bit 1
R/W
R/W
R/W
R/W
R/W
IT
IT
IT
0
1
0
0
0
1
1
1
XRT94L33
Rev.1.2.0.
B
B
B
R/W
R/W
R/W
Bit 0
R/W
Bit 0
R/W
IT
IT
IT
0
1
0
0
0
0
0
0

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