xr16v2650im Exar Corporation, xr16v2650im Datasheet - Page 34
![no-image](/images/manufacturer_photos/0/2/243/exar_corporation_sml.jpg)
xr16v2650im
Manufacturer Part Number
xr16v2650im
Description
High Performance Duart With 32-byte Fifo
Manufacturer
Exar Corporation
Datasheet
1.XR16V2650IM.pdf
(47 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
xr16v2650im-F
Manufacturer:
Exar Corporation
Quantity:
10 000
XR16V2650
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
EFR[6]: Auto RTS Flow Control Enable
RTS# output may be used for hardware flow control by setting EFR bit-6 to logic 1. When Auto RTS is
selected, an interrupt will be generated when the receive FIFO is filled to the selected trigger level and RTS de-
asserts HIGH at the next upper trigger level. RTS# will return LOW when FIFO data falls below the next lower
trigger level. The RTS# output must be asserted (LOW) before the auto RTS can take effect. RTS# pin will
function as a general purpose output when hardware flow control is disabled.
•
•
EFR[7]: Auto CTS Flow Control Enable
Automatic CTS Flow Control.
•
•
These registers are used as the programmable software flow control characters xoff1, xoff2, xon1, and xon2.
For more details, see
4.14.1
Logic 0 = Automatic RTS flow control is disabled (default).
Logic 1 = Enable Automatic RTS flow control.
Logic 0 = Automatic CTS flow control is disabled (default).
Logic 1 = Enable Automatic CTS flow control. Data transmission stops when CTS# input de-asserts HIGH.
Data transmission resumes when CTS# returns LOW.
Software Flow Control Registers (XOFF1, XOFF2, XON1, XON2) - Read/Write
Table
7.
34
REV. 1.0.2