xr16v794iv Exar Corporation, xr16v794iv Datasheet - Page 17
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xr16v794iv
Manufacturer Part Number
xr16v794iv
Description
High Performance 2.25v To 3.6v Quad Uart With Fractional
Manufacturer
Exar Corporation
Datasheet
1.XR16V794IV.pdf
(53 pages)
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REV. 1.0.0
The 794 supports low voltage system designs, hence, a sleep mode is included to reduce its power
consumption when the chip is not actively used.
All of these conditions must be satisfied for the 794 to enter sleep mode:
The 794 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for no
clock output as an indication that the device has entered the sleep mode.
The 794 resumes normal operation by any of the following:
If the 794 is awakened by any one of the above conditions, it will generate an interrupt. If the interrupt for the
event that woke up the 794 is not enabled, then a special wake-up interrupt occurs where reading the interrupt
status register will return a "no interrupt" indication. For example, there is a change of state on the CTS# input
that wakes up the 794, but the MSR interrupt is not enabled. Reading the interrupt status register will return a
value indicating that there are no pending interrupts and will clear the wake-up interrupt.
The 794 will return to the sleep mode automatically after all interrupting conditions have been serviced and
cleared. If the 794 is awakened by the modem inputs, a read to the MSR is required to reset the modem inputs.
In any case, the sleep mode will not be entered while an interrupt is pending in any channel. The 794 will stay
in the sleep mode of operation until it is disabled by setting SLEEP = 0x00.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate.
2.15
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no interrupts pending for all 4 channels of the 794 (ISR bit-0 = 1)
SLEEP register = 0xFF
modem inputs are not toggling (MSR bits 0-3 = 0)
RX input pin of all 4 channels are idling HIGH
a receive data start bit transition (HIGH to LOW)
a data byte is loaded to the transmitter, THR or FIFO
a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
Sleep Mode with Auto Wake-Up
HIGH PERFORMANCE 2.25V TO 3.6V QUAD UART WITH FRACTIONAL BAUD RATE
17
XR16V794