xr16l2752ij Exar Corporation, xr16l2752ij Datasheet - Page 13

• Manufacturer Part Number: xr16l2752ij
• Description: 2.25v To 5.5v Duart With 64-byte Fifo
• Manufacturer: Exar Corporation

xr
REV. 1.2.1
when data is not received for 4 word lengths as defined by LCR[1,0] plus 12 bits time. This is equivalent to 3.7-
4.6 character times. The RHR interrupt is enabled by IER bit-0.
The Receive Holding Register is an 8-bit register that holds a receive data byte from the Receive Shift
Register. It provides the receive data interface to the host processor. The RHR register is part of the receive
FIFO of 64 bytes by 11-bits wide, the 3 extra bits are for the 3 error tags to be reported in LSR register. When
the FIFO is enabled by FCR bit-0, the RHR contains the first data character received by the FIFO. After the
RHR is read, the next character byte is loaded into the RHR and the errors associated with the current data
byte are immediately updated in the LSR bits 2-4.
N
F
F
2.13.1
OTE
IGURE
IGURE
:
Table-B selected as Trigger Table for
Receive Data
Byte and Errors
9. R
10. R
16X or 8X Clock
(EMSR bit-7)
64 bytes by 11-bit
Receive Holding Register (RHR) - Read-Only
ECEIVER
ECEIVER
FIFO
wide
16X or 8X Clock
(EMSR bit-7)
and Errors
O
Data Byte
Receive
O
PERATION IN NON
PERATION IN
Receive Data Shift
Register (RSR)
Data FIFO
Receive
LSR bits
Receive
Figure 10
FIFO
Tags in
Error
Data
4:2
-FIFO M
AND
Receive Data Shift
Register (RSR)
Holding Register
(
A
Receive Data
Table 10
ODE
UTO
FIFO Trigger=16
Validation
Data fills to 24
Data Bit
Data falls to 8
(RHR)
Example
RTS F
13
: - RX FIFO trigger level selected at 16
).
LOW
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
Validation
(See Note Below)
Data Bit
RHR Interrupt (ISR bit-2) programmed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
C
bytes
ONTROL
RHR Interrupt (ISR bit-2)
M
Receive Data Characters
ODE
Receive Data Characters
RXFIFO1
XR16L2752
RXFIFO1