xr17l154iv Exar Corporation, xr17l154iv Datasheet - Page 38

• Manufacturer Part Number: xr17l154iv
• Description: 3.3v Pci Bus Quad Uart
• Manufacturer: Exar Corporation

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LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL/DLM) enable.
Modem Control Register (MCR)
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Pins
The DTR# pin may be used for automatic hardware flow control enabled by EFR bit-6 and MCR bit-2=1. If the
modem interface is not used, this output may be used for general purpose.
MCR[1]: RTS# Pins
The RTS# pin may be used for automatic hardware flow control by enabled by EFR bit-6 and MCR bit-2=0. If
the modem interface is not used, this output may be used for general purpose.
MCR[2]: DTR# or RTS# for Auto Flow Control
The OP1 output is not available in the XR17L152. It is present for 16C550 compatibility during internal
loopback. See
DTR# or RTS# auto hardware flow control select. This bit is in effect only when auto RTS/DTR is enabled by
EFR bit-6.
MCR[3]: (OP2)
The OP2 output is not available in the XR17L154. It is present for 16C550 compatibility during internal
loopback. See
MCR[4]: Internal Loopback Enable
MCR[5]: Xon-Any Enable
MCR[6]: Infrared Encoder/Decoder Enable
This bit overrides the ENIR pin selection.
DISCONTINUED
Logic 0 = Data registers are selected. (default)
Logic 1 = Divisor latch registers are selected.
Logic 0 = Force DTR# output to a logic 1 (default).
Logic 1 = Force DTR# output to a logic 0.
Logic 0 = Force RTS# output to a logic 1 (default).
Logic 1 = Force RTS# output to a logic 0.
Logic 0 = Uses RTS#/CTS# pins for auto hardware flow control.
Logic 1 = Uses DTR#/DSR# pin is used for auto hardware flow control.
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and
Logic 0 = Disable Xon-Any function (for 16C550 compatibility) (default).
Logic 1 = Enable Xon-Any function. In this mode any RX character received will enable Xon, resume data
transmission.
Logic 0 = Disable the infrared mode (default).
Logic 1 = Enable infrared IrDA receive and transmit inputs/outputs. While in this mode, the TX/RX output/
input are routed to the infrared encoder/decoder. The data input and output levels will conform to the IrDA
infrared interface requirement. As such, while in this mode the infrared TX output will be a logic 0 during idle
data conditions. FCTR bit-4 may be selected to invert the RX input signal level going to the decoder for
infrared modules that provide rather an inverted output.
Figure
Figure
11. Logic zero is default.
11. Logic zero is default.
38
Figure
11.
3.3V PCI BUS QUAD UART
XR17L154
REV. 1.1.0