sc16c652b NXP Semiconductors, sc16c652b Datasheet - Page 5

• Manufacturer Part Number: sc16c652b
• Description: 5v, 3.3 V And 2.5v Dual Uart, 5 Mbit/s Max. ,with 32-byte Fifos And Infrared Irda Encoder/decoder
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 2:
SC16C652B_4
Product data sheet
Symbol
A0
A1
A2
CDA
CDB
CSA
CSB
CTSA
CTSB
DSRA
DSRB
DTRA
DTRB
D0
D1
D2
D3
D4
D5
D6
D7
GND
INTA
INTB
IOR
28
27
26
40
16
10
11
38
23
39
20
34
35
44
45
46
47
48
1
2
3
17
30
29
19
LQFP48 HVQFN32
Pin description
5.2 Pin description
Pin
19
18
17
-
-
8
9
25
16
-
-
-
-
27
28
29
30
31
32
1
2
13
21
20
14
Type Description
I
I
I
I
I
I
I
O
I/O
I
O
I
Address 0 select bit. Internal register address selection.
Address 1 select bit. Internal register address selection.
Address 2 select bit. Internal register address selection.
Carrier Detect (active LOW). These inputs are associated with individual UART
channels A through B. A logic 0 on this pin indicates that a carrier has been
detected by the modem for that channel.
Chip Select A, B (active LOW). This function is associated with individual
channels, A through B. These pins enable data transfers between the user CPU
and the SC16C652B for the channel(s) addressed. Individual UART sections (A, B)
are addressed by providing a logic 0 on the respective CSA, CSB pin.
Clear to Send (active LOW). These inputs are associated with individual UART
channels, A through B. A logic 0 on the CTS pin indicates the modem or data set is
ready to accept transmit data from the SC16C652B. Status can be tested by
reading MSR[4]. This pin has no effect on the UART’s transmit or receive
operation.
Data Set Ready (active LOW). These inputs are associated with individual UART
channels, A through B. A logic 0 on this pin indicates the modem or data set is
powered-on and is ready for data exchange with the UART. This pin has no effect
on the UART’s transmit or receive operation.
Data Terminal Ready (active LOW). These outputs are associated with individual
UART channels, A through B. A logic 0 on this pin indicates that the SC16C652B is
powered-on and ready. This pin can be controlled via the modem control register.
Writing a logic 1 to MCR[0] will set the DTR output to logic 0, enabling the modem.
This pin will be a logic 1 after writing a logic 0 to MCR[0], or after a reset. This pin
has no effect on the UART’s transmit or receive operation.
Data bus (bi-directional). These pins are the 8-bit, 3-state data bus for
transferring information to or from the controlling CPU. D0 is the least significant bit
and the first data bit in a transmit or receive serial data stream.
Signal and power ground.
Interrupt A, B (3-state). This function is associated with individual channel
interrupts, INTA, INTB. INTA, INTB are enabled when MCR bit 3 is set to a logic 1,
interrupts are enabled in the Interrupt Enable Register (IER), and is active when an
interrupt condition exists. Interrupt conditions include: receiver errors, available
receiver buffer data, transmit buffer empty, or when a modem status flag is
detected.
Read strobe (active LOW strobe). A logic 0 transition on this pin will load the
contents of an internal register defined by address bits A0 to A2 onto the
SC16C652B data bus (D0 to D7) for access by external CPU.
Rev. 04 — 1 September 2005
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC16C652B
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