wm8350 Wolfson Microelectronics plc, wm8350 Datasheet - Page 117
wm8350
Manufacturer Part Number
wm8350
Description
Wolfson Audioplus? Stereo Codec With Power Management
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM8350.pdf
(345 pages)
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14.4.3
The WM8350 can be configured in Development mode by writing to control bits that determine its
startup behaviour. The locations of these register bits are shown in Table 63 below. A typical
configuration sequence would include writes to some or all of the registers listed. If none of the
highlighted bits in any given register needs to be changed from its default, then no write to that
register is recommended.
The configuration bits include:
Typically, the final step in the sequence is a write to register R6, in order to:
CONFIGURING THE WM8350 IN DEVELOPMENT MODE
Duration control bits for the /RST reset signal (RSTB_TO)
GPIO pull-up / pull-down settings and debounce times (GPn_PD, GPn_PU, GPn_DB and
GP_DBTIME)
Alternate function and input/output selection for GPIO pins (GPn_FN, GPn_DIR and
GPn_CFG)
Voltage settings for DC-DC converters and LDO regulators (DCn_VSEL and LDOn_VSEL)
Time slots for automatic start of all DC-DC converters, all LDO regulators and the Current
Limit Switch during startup (DCn_ENSLOT, LDOn_ENSLOT and LS_ENSLOT). Note that
supplies can be programmed to not start up automatically by setting the respective
_ENSLOT bits to 0000.
Select the WM8350 device address on the primary control interface, using the DEV_ADDR
bits.
Allow the WM8350 to proceed to startup. This is achieved by setting the CONFIG_DONE
bit (R6 bit 12) to 1.
Switch the control interface back to the primary interface (if desired), so that a host
processor can communicate with the WM8350. This is achieved by setting
USE_DEV_PINS (R6 bit 15) to 0.
PD, June 2009, Rev 4.1
WM8350
117
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