zl2005 Intersil Corporation, zl2005 Datasheet - Page 32

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zl2005

Manufacturer Part Number
zl2005
Description
Digital-dc? Integrated Power Management And Conversion Ic
Manufacturer
Intersil Corporation
Datasheet

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Table 24. Tracking Mode Configuration
No resistor
.
12.1 k
13.3 k
14.7 k
16.2 k
17.8 k
19.6 k
10 k
11 k
R
SS1
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
V
V
V
Figure 17. Tracking Modes
TRK
OUT
OUT
Tracking
ZL2005
Ratio
100%
50%
Ratiometric
Coincident
SW
GH
GL
32
Limited by target voltage and 110% of
Limited by target voltage and 110% of
V
Limited by VTRK pin voltage 110%
Limited by VTRK pin voltage 110%
IN
Q2
Q1
L1
of V(0,1) pin-strap setting
of V(0,1) pin-strap setting
V(0,1) pin-strap setting
V(0,1) pin-strap setting
Upper Track Limit
V
V
V
V
C1
V
TRK
OUT
TRK
OUT
Time
Time
OUT
Tracking mode is disabled
ZL2005
The master ZL2005 device in a tracking group is
defined as the device that has the highest target output
voltage within the group. This master device will con-
trol the ramp rate of all tracking devices and is not
configured for tracking mode. A delay of at least 10
ms must be configured into the master device using
the DLY0/1 pins, and the user may also configure a
specific ramp rate using the SS0/1 pins. Any device
that is configured for tracking mode will ignore its
soft-start delay and ramp time settings (SS0/1 and
DLY0/1 pins) and its output will take on the turn-on/
turn-off characteristics of the reference voltage present
at the VTRK pin. The tracking mode for all other
devices can be set by connecting a resistor from the
SS1 pin to ground according to Table 24. All of the
ENABLE pins in the tracking group must be con-
nected together and driven by a single logic source.
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Output not allowed to decrease before PG
Ramp-up/Ramp-down Behavior
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
Output will always follow VTRK
February 18, 2009
FN6848.0

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