zl2005 Intersil Corporation, zl2005 Datasheet - Page 9

• Manufacturer Part Number: zl2005
• Description: Digital-dc? Integrated Power Management And Conversion Ic
• Manufacturer: Intersil Corporation

Table 4. Pin Descriptions (Continued)
NOTES:
1. I = Input, O = Output, PWR = Power or Ground, M = Multi-mode pin (refer to Section 4.4, “Multi-mode Pins,” )
2. The SYNC pin can be used as a logic pin, a clock input or a clock output.
3. V
ePad
Pin
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
DD
is measured internally and the value is used to modify the PWM loop gain.
XTEMP
ISENA
ISENB
VTRK
PGND
SGND
VSEN
TACH
VDD
Label
DLY0
DLY1
MGN
CFG
BST
V25
SS0
SS1
SW
GH
VR
GL
EN
PG
3
Type
PWR
PWR
PWR
PWR
PWR
PWR
PWR
I, M
I, M
9
O
O
O
I
I
I
I
I
I
I
I
I
1
Soft start pins. Set the output voltage ramp time during turn-on and turn-off.
Tracking sense input. Used to track an external voltage source.
Output voltage feedback. Connect to output regulation point.
Differential voltage input for current limit.
Differential voltage input for current limit. High voltage tolerant.
Internal 5V reference used to power internal drivers.
Low side FET gate drive.
Power ground. Connect to low impedance ground plane.
Drive train switch node.
High-side FET gate drive.
High-side drive boost voltage.
Supply voltage.
Internal 2.5 V reference used to power internal circuitry.
External temperature sensor input. Connect to external 2N3904 diode connected
transistor.
Tachometer input used to measure fan speed. Connect to TACH output of
external fan.
Digital V
Configuration pin. Used to control the switching phase offset, sequencing and
other management features.
Enable. Active signal enables PWM switching.
Softstart delay select. Sets the delay from when EN is asserted until the output
voltage starts to ramp.
Power good output.
Exposed thermal pad. Connect to low impedance ground plane. Internal
connection to SGND.
OUT
margin control
ZL2005
Description
February 18, 2009
FN6848.0