m52d64164a Elite Semiconductor Memory Technology Inc., m52d64164a Datasheet - Page 14
m52d64164a
Manufacturer Part Number
m52d64164a
Description
1m X 16 Bit X 4 Banks Mobile Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
1.M52D64164A.pdf
(48 pages)
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ESMT
COMMANDS
Mode register set command
this command, A0 through BA0 are the data input pins. After power on, the mode
register set command must be executed to initialize the device.
(t
commands.
Extended Mode register set command
TCSR, DS.
Activate command
address selected by A0 through A11.
Elite Semiconductor Memory Technology Inc.
MRD
The M52D64164A has a mode register that defines how the device operates. In
The mode register can be set only when all banks are in idle state. During 2CLK
The M52D64164A has a extended mode register that defines how to set PASR,
The M52D64164A has four banks, each with 4,096 rows.
This command activates the bank selected by BA1 and BA0 (BS) and a row
This command corresponds to a conventional DRAM’s RAS falling.
) following this command, the M52D64164A cannot accept any other
(
( CS , RAS , CAS , WE , BA0 = Low ; BA1= High)
( CS , RAS = Low, CAS , WE = High)
CS
,
RAS
,
CAS
,
WE
,
BA1, BA0 = Low)
Publication Date: Jul. 2009
Revision: 1.6
M52D64164A
14/48
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