as6c2016 Alliance Memory, Inc, as6c2016 Datasheet - Page 5

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as6c2016

Manufacturer Part Number
as6c2016
Description
Static Random Access Memory
Manufacturer
Alliance Memory, Inc
Datasheet

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AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
LB#, UB# Access Time
LB#, UB# to High-Z Output
LB#, UB# to Low-Z Output
(2) WRITE CYCLE
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
LB#, UB# Valid to End of Write
*These parameters are guaranteed by device characterization, but not production tested.
FEBRUARY/2008, V 1.c
January 2007
FEBRUARY 2008
PARAMETER
PARAMETER
128K X 16 BIT LOW POWER CMOS SRAM
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
RC
AA
ACE
OE
CLZ
OLZ
CHZ
OHZ
OH
BA
BHZ
BLZ
WC
AW
CW
AS
WP
WR
DW
DH
OW
WHZ
BW
SYM.
SYM.
*
*
Alliance Memory Inc.
*
*
*
*
*
*
MIN.
MIN.
AS6C2016-55
AS6C2016-55
55
10
10
10
55
50
50
45
25
50
512K X 8 BIT LOW POWER CMOS SRAM
0
5
0
0
5
-
-
-
-
-
-
-
-
0.2V to V
3ns
1.5V
C
L
= 30pF + 1TTL, I
MAX.
MAX.
CC
55
55
30
20
20
55
25
20
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- 0.2V
OH
UNIT
UNIT
ns
ns
ns
ns
ns
ns
/I
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
OL
= -2mA/4mA
Page 5 of 13
AS6C2016

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