cp3cn17 National Semiconductor Corporation, cp3cn17 Datasheet - Page 199

• Manufacturer Part Number: cp3cn17
• Description: Reprogrammable Connectivity Processor With Can Interface
• Manufacturer: National Semiconductor Corporation

26.9
Symbol Figure
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
MDOnf
MDOh
MSKh
MSKp
MSKh
MCSh
MCSs
MSKh
MSKp
MSKd
MSKs
MDOf
MSKl
MDIh
MSKl
MDIs
MICROWIRE/SPI TIMING
100
100
100
102
98
98
98
99
98
98
98
99
98
99
98
98
98
98
98
98
99
98
98
98
99
Microwire Clock High
Microwire Clock Low
Microwire Clock Period
MSK Hold (slave only)
MSK Setup (slave only)
MWCS Hold (slave only)
MWCS Setup (slave only)
Microwire Data In Hold (master)
Microwire Data In Hold (slave)
Microwire Data In Setup
Microwire Clock High
Microwire Clock Low
Microwire Clock Period
MSK Leading Edge Delayed (master
only)
Microwire Data Float
(slave only)
Microwire Data Out Hold
Microwire Data No Float (slave only)
Description
b
Table 74 Microwire/SPI Signals
Microwire/SPI Output Signals
Microwire/SPI Input Signals
At 2.0V (both edges)
At 0.8V (both edges)
SCIDL bit = 0; Rising Edge
(RE) MSK to next RE MSK
SCIDL bit = 1; Falling Edge
(FE) MSK to next FE MSK
After MWCS goes inactive
Before MWCS goes active
SCIDL bit = 0: After FE
MSK
SCIDL bit = 1: After RE
MSK
SCIDL bit = 0: Before RE
MSK
SCIDL bit = 1: Before FE
MSK
Normal Mode: After RE
MSK
Alternate Mode: After FE
MSK
Normal Mode: After RE
MSK
Alternate Mode: After FE
MSK
Normal Mode: Before RE
MSK
Alternate Mode: Before FE
MSK
At 2.0V (both edges)
At 0.8V (both edges)
SCIDL bit = 0: Rising Edge
(RE) MSK to next RE MSK
SCIDL bit = 1: Falling Edge
(FE) MSK to next FE MSK
Data Out Bit #7 Valid
After RE on MCSn
Normal Mode: After FE
MSK
Alternate Mode: After RE
MSK
After FE on MWCS
199
Reference
Min (ns)
0.5 t
200
100
0.0
80
80
40
80
40
80
40
80
40
40
0
0
-
MSK
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Max (ns)
1.5 t
25
25
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MSK