cp3cn23 National Semiconductor Corporation, cp3cn23 Datasheet - Page 31
![no-image](/images/no-image-200.jpg)
cp3cn23
Manufacturer Part Number
cp3cn23
Description
Cp3cn23 Reprogrammable Connectivity Processor With Dual Can Interfaces
Manufacturer
National Semiconductor Corporation
Datasheet
1.CP3CN23.pdf
(246 pages)
- Current page: 31 of 246
- Download datasheet (3Mb)
8.0
The flash memory consists of the flash program memory
and the flash data memory. The flash program memory is
further divided into the Boot Area and the Code Area.
A special protection scheme is applied to the lower portion
of the flash program memory, called the Boot Area. The
Boot Area always starts at address 0 and ranges up to a
programmable end address. The maximum boot area ad-
dress which can be selected is 00 77FFh. The intended use
of this area is to hold In-System-Programming (ISP) rou-
tines or essential application routines. The Boot Area is al-
ways protected against CPU write access, to avoid
unintended modifications.
The Code Area is intended to hold the application code and
constant data. The Code Area begins with the next byte af-
ter the Boot Area. Table 10 summarizes the properties of
the regions of flash memory mapped into the CPU address
space.
8.1
The memory protection mechanisms provide both global
and section-level protection. Section-level protection
against CPU writes is applied to individual 8K-byte sections
of the flash program memory and 512-byte sections of the
flash data memory. Section-level protection is controlled
through read/write registers mapped into the CPU address
space. Global write protection is applied at the device level,
to disable flash memory writes by the CPU. Global write pro-
tection is controlled by the encoding of bits stored in the
flash memory array.
8.1.1
Each bit in the Flash Memory Write Enable (FM0WER and
FM1WER) registers enables or disables write access to a
corresponding section of flash program memory. Write ac-
cess to the flash data memory is controlled by the bits in the
Flash Slave Memory Write Enable (FSM0WER) register. By
Code
Area
Area
Area
Data
Area
Boot
BOOTAREA
Flash Memory
FLASH MEMORY PROTECTION
Section-Level Protection
0D 0000h
0
Address Range
Table 10 Flash Memory Areas
–
BOOTAREA - 1
–
–
0D 1FFFh
03 FFFFh
Access
Read
Yes
Yes
Yes
Write Access
only if section
only if section
Write access
Write access
bit is set and
bit is set and
write enable
protection is
write enable
protection is
global write
global write
disabled.
disabled.
No
31
default (after reset) all bits in the FM0WER, FM1WER, and
FSM0WER registers are cleared, which disables write ac-
cess by the CPU to all sections. Write access to a section is
enabled by setting the corresponding write enable bit. After
completing a programming or erase operation, software
should clear all write enable bits to protect the flash program
memory against any unintended writes.
8.1.2
The WRPROT field in the Protection Word controls global
write protection. The Protection Word is located in a special
flash memory outside of the CPU address space. If a major-
ity of the bits in the 3-bit WRPROT field are clear, write pro-
tection is enabled. Enabling this mode prevents the CPU
from writing to flash memory.
The RDPROT field in the Protection Word controls global
read protection. If a majority of the bits in the 3-bit RDPROT
field are clear, read protection is enabled. Enabling this
mode prevents reading by an external debugger through the
serial debug interface or by an external flash programmer.
CPU read access is not affected by the RDPROT bits.
8.2
Each of the flash memories are divided into main blocks and
information blocks. The main blocks hold the code or data
used by application software. The information blocks hold
factory parameters, protection settings, and other device-
specific data. The main blocks are mapped into the CPU ad-
dress space. The information blocks are accessed indirectly
through a register-based interface. Separate sets of regis-
ters are provided for accessing flash program memory (FM
registers) and flash data memory (FSM registers). The flash
program memory consists of two main blocks and two data
blocks, as shown in Table 11. The flash data memory con-
sists of one main block and one information block.
Main Block 0
Main Block 1
Main Block 2
Information
Information
Information
Block 0
Block 1
Block 2
Name
Global Protection
FLASH MEMORY ORGANIZATION
Table 11 Flash Memory Blocks
(CPU address space)
(CPU address space)
(CPU address space)
0D 0000h
00 0000h
02 0000h
(address register)
(address register)
(address register)
Address Range
000h
080h
000h
–
–
–
–
–
–
01 FFFFh
03 FFFFh
0FFh
0D 1FFFh
07Fh
07Fh
Protection Word,
Function Word,
Flash Program
Flash Program
www.national.com
Parameters
Flash Data
User Data
User Data
Function
Memory
Memory
Memory
Factory
Related parts for cp3cn23
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![mma1270keg](/images/no-image3.png)
Part Number:
Description:
Freescale Semiconductor Technical Data
Manufacturer:
National Semiconductor Corporation
Datasheet:
![ADC12034](/images/no-image3.png)
Part Number:
Description:
Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LMX2350](/images/no-image3.png)
Part Number:
Description:
Pllatinum Tm Fractional N Rf / Integer N If Dual Low Power Frequency Synthesizer
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LMX2324](/images/no-image3.png)
Part Number:
Description:
Pllatinum? 2.0 Ghz Frequency Synthesizer For Rf Personal Communications
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LMX2301](/images/no-image3.png)
Part Number:
Description:
Pllatinumtm 160 Mhz Frequency Synthesizer For Rf Personal Communications
Manufacturer:
National Semiconductor Corporation
Datasheet:
![NDS8963](/images/no-image3.png)
Part Number:
Description:
Dual N-channel Enhancement Mode Field Effect Transistor
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM1201](/images/no-image3.png)
Part Number:
Description:
Video Amplifier System (obsolete)
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM3501TL-16](/images/no-image3.png)
Part Number:
Description:
Synchronous Step-up DC/DC Converter For White Led Applications
Manufacturer:
National Semiconductor Corporation
Datasheet:
![AD9621](/images/no-image3.png)
Part Number:
Description:
CLC420 - High Speed, Voltage Feedback op Amp, Package: Lcc, Pin Nb=20
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM2403](/images/no-image3.png)
Part Number:
Description:
Monolithic Triple 4.5 CRT Driver
Manufacturer:
National Semiconductor Corporation
Datasheet:
![LM592M](/images/no-image3.png)
Part Number:
Description:
Differential Video Amplifier
Manufacturer:
National Semiconductor Corporation
Datasheet:
![ADC10061](/images/no-image3.png)
Part Number:
Description:
ADC10061 - 10-Bit 600 NS A/D Converter With Input Multiplexer And Sample/Hold, Package: Soic Wide, Pin Nb=20
Manufacturer:
National Semiconductor Corporation
Datasheet:
![DS36277TMX](/images/no-image3.png)
Part Number:
Description:
DS36277 - Dominant Mode Multipoint Transceiver, Package: Soic Narrow, Pin Nb=8
Manufacturer:
National Semiconductor Corporation
Datasheet:
![DS3654](/images/no-image3.png)
Part Number:
Description:
Printer Solenoid Driver
Manufacturer:
National Semiconductor Corporation
Datasheet:
![DS3662](/images/no-image3.png)
Part Number:
Description:
Quad High Speed Trapezoidal Bus Transceiver
Manufacturer:
National Semiconductor Corporation
Datasheet: