ak4620b AKM Semiconductor, Inc., ak4620b Datasheet - Page 23

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ak4620b

Manufacturer Part Number
ak4620b
Description
24-bit 192khz Audio Codec With Ipga
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
The AK4620B includes two channel-independent analog volumes (IPGA), each with 32 levels in 0.5dB increments.
These are located in front of the ADC while digital volume controls (IATT) with 128 levels (including MUTE) are
located after the ADC. Control of both of these volume settings is handled by the same register address. When the MSB of
the register is “1”, the IPGA changes and when the MSB = “0” the IATT changes.
The IPGA is an analog volume control that improves the S/N ratio compared with digital volume controls (Table 11).
Level changes only occur during zero-crossings to minimize switching noise. Channel independent zero-crossing
detection is used. If there are no zero-crossings, then the level will change after a time-out. The time-out period scales
with fs. The periods of 256/fs, 512/fs, 1024/fs and 2048/fs are selected by ZTM1-0 bits in normal speed mode. If a new
value is written to the IPGA register before the IPGA changes at the zero crossing or time-out, the previous value
becomes invalid. The timer (channel independent) for time-out is reset and the timer restarts for the new IPGA value.
ZCEI bits in the control register enable zero-crossing detection.
The IATT is a log volume that is linear-interpolated internally. When changing the level, the transition between ATT
values has 29 levels and is done by soft changes, eliminating any switching noise.
The AK4620B includes channel independent digital output volumes (ATT) with 256 levels at linear steps including
MUTE. These volumes are in front of the DAC and can attenuate the input data from 0dB to −48dB and mute. When
changing levels, transitions are executed via soft changes, eliminating any switching noise. The transition time of 1 level
and all 256 levels is shown in Table 13.
MS0401-E-00
Input Volume
Output Volume
ZTM1
Sampling Speed
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
0
0
1
1
fs=44.1kHz, A-weight
ZTM0
Table 12. LRCK cycles for timeout period
0
1
0
1
Table 11. IPGA+ADC S/N (typ.)
Table 13. ATT Transition Time
Normal speed
110dB
1024/fs
2048/fs
256/fs
512/fs
16LRCK
0dB
4LRCK
8LRCK
1 Level
- 23 -
Transition Time
Input Gain Setting
Double speed
108dB
+6dB
1024/fs
2048/fs
4096/fs
512/fs
1020LRCK
2040LRCK
4080LRCK
255 to 0
+18dB
101dB
Quad speed
1024/fs
2048/fs
4096/fs
8192/fs
Default
[AK4620B]
2005/07

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