ak4620b AKM Semiconductor, Inc., ak4620b Datasheet - Page 30

• Manufacturer Part Number: ak4620b
• Description: 24-bit 192khz Audio Codec With Ipga
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
MS0401-E-00
Addr
00H
Register Definitions
PWDA: DAC power down
PWAD: ADC power down
PWVR: Vref power down
ZOS: Zero-detection/ Overflow-detection control for #15 and 16 pins.
ZOE: Zero-detection / Overflow-detection Disable
DZFB: Inverting Enable of DZF
SLOW: DAC Slow Roll-off Filter Enable
0: Sharp Roll-off Filter (Default)
1: Slow Roll-off Filter
0: Enable (Default)
1: Disable. Outputs “L”.
0: DZF goes “H” at Zero Detection (Default)
1: DZF goes “L” at Zero Detection
0: Power down
1: Power up (Default)
0: Power down
1: Power up (Default)
0: Power down
1: Power up (Default)
0: Overflow detection for ADC input (Default)
1: Zero detection for DAC input.
Register Name
Power Down Control
“0” powers down only the DAC section and then the AOUTs go to Hi-Z immediately. The contents of all
registers are not initialized and enabled to write to the registers. After exiting power down mode, the OATTs
fade in/out the setting value of the control register (06H & 07H). The analog output should be muted externally
as some pop noise may occur when entering and exiting this mode.
“0” powers down only the ADC and then the SDTO goes “L” immediately. The IPGAs also go “00H”, but the
contents of all registers are not initialized and enabled to write to the registers. After exiting power down
mode, the IPGAs fade in the setting value of the control register (04H & 05H). At that time, the ADCs output
“0” during first 516 LRCK cycles.
“0” powers all sections down and then both ADC and DAC do not operate. The contents of all register values
are not initialized and enabled to write to the registers. When PWAD and PWDA bits go to “0” and PWVR bit
goes to “1”, only the VREF section can be powered up.
DEFAULT
SLOW
D7
0
DZFB
D6
0
- 30 -
ZOE
D5
0
ZOS
D4
0
D3
0
0
PWVR
D2
1
PWAD
D1
1
[AK4620B]
PWDA
2005/07
D0
1