ml7033 Oki Semiconductor, ml7033 Datasheet - Page 48

• Manufacturer Part Number: ml7033
• Description: Dual-channel Line Card Codec
• Manufacturer: Oki Semiconductor

CR18 (Test control)
B7, B6
B5, B4
B3 to B0
1 Semiconductor
default
CR18
LOOP1
… CH2 loop-back test mode select
… CH1 loop-back test mode select
… LSI test registers for an LSI manufacturer
A loop-back test is functional only if XSYNC and RSYNC are from the same clock source.
A loop-back test is functional if XSYNC and RSYNC are from the same clock source.
CH2
B7
0
(1, 0) = Channel 1 digital loop-back test. PCM data is output on the PCMOUT pin in
(1, 1) = Channel 1 analog loop-back test. Analog signals output on the AOUT1P pin (or
(B7, B6):
(0, 0) = Loop-back OFF
(0, 1) = Loop-back OFF
(1, 0) = Channel 2 digital loop-back test. PCM data output on the PCMOUT pin during
(1, 1) = Channel 2 analog loop-back test. Analog signals output on the AOUT2P pin (or the
(B5, B4):
(0, 0) = Loop-back OFF
(0, 1) = Loop-back OFF
The default alternation is prohibited. When a write action is executed for CR18, set all of
these bits to “0”.
LOOP0
normal operation is internally looped back through the Receive path via the
PCMIN pin. In digital loop-back test mode, input data on PCMIN pin is ignored,
but PCM data continues to be output on the PCMOUT pin.
normal operation is internally looped back through the Receive path via the
PCMIN pin. In loop-back test mode, input data on PCMIN pin is ignored. However,
PCM data can be output on the PCMOUT pin.
AOUT2P and AOUT2N pins) are internally looped back to the transmit path
behind a built-in feedback amplifier located after the AIN2P, AIN2N and GSX2
pins. In this mode, the AIN2P and AIN2N input pins are ignored. However, analog
signals continue to be output on the AOUT2P pin (or the AOUT2P and the
AOUT2N pins).
from the AOUT1P and the AOUT1N pins) are internally looped back to the
transmit path via a built-in feedback amplifier located after the AIN1P, AIN1N and
GSX1 pins. In this mode, the AIN1P and AIN1N input pins are ignored. However,
analog signals can be output from the AOUT1P pin (or from the AOUT1P and the
AOUT1N pins).
CH2
B6
0
LOOP1
CH1
B5
0
LOOP0
CH1
B4
0
TEST3
B3
0
TEST2
B2
0
TEST1
B1
0
FEDL7033-02
TEST0
ML7033
B0
0
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