tmc1175 Cadeka Microcircuits LLC., tmc1175 Datasheet - Page 5

• Manufacturer Part Number: tmc1175
• Description: Video A/d Converter 8 Bit, 40 Msps
• Manufacturer: Cadeka Microcircuits LLC.

PRODUCT SPECIFICATION
Pin Descriptions
Bandwidth Specification Notes
The specification for bandwidth of an A/D converter is some-
what different from the normal frequency-response specifi-
cation used in amplifiers and filters. An understanding of the
differences will help in selecting converters properly for par-
ticular applications.
A/D conversion comprises two distinct processes: sampling
and quantizing. Sampling is “grabbing” a snapshot of the
input signal and holding it steady for quantizing. The quan-
tizing process is approximating the analog input, which may
be any value within the conversion range, with its nearest
numerical value. While sampling is a high-frequency pro-
cess, quantizing operates on a dc signal, held steady by the
track/hold circuit. Therefore, the sampling process is what
relates to the dynamic characteristics of the converter.
REV. 1.3.3 2/28/02
Pin Name
Inputs
V
R
R
VR+
VR–
OE
CONV
Outputs
D
Power
V
V
A
D
No Connect
N/C
IN
DDA
DDD
GND
T
B
7-0
GND
14, 15, 18 17, 18,
11, 13
20, 21
10–3
2, 24
M7
Pin Number
19
17
23
16
22
12
1
1, 8, 15,
13, 16
24, 25
12–9,
3, 28
7–4
R3
23
20
27
19
26
14
21
22
2
Pin Type Pin Function Description
R
CMOS/
CMOS
CMOS
T
open
2.6V
0.6V
0.0V
0.0V
+5V
+5V
TTL
– R
B
Analog Input. The input voltage conversion range lies between the
voltages applied to the RT and RB pins.
Reference Voltage Top Input. R
resistor ladder. A DC voltage applied to R
of the V
Reference Voltage Bottom Input. R
reference resistor ladder. A DC voltage applied to R
negative end of the V
Reference Voltage Top Source. VR+ is the internal pull-up
reference resistor for self-bias operations.
Reference Voltage Bottom Source. VR- is the internal pull-down
reference resistor for self-bias operations.
Output Enable. (CMOS-compatible) When LOW, D
When HIGH, D
Convert (Clock) Input. (CMOS-compatible) V
falling edge of CONV.
Data Outputs (D7 = MSB). Eight-bit CMOS- and TTL-compatible
digital outputs. Data is output following the rising edge of CONV.
Analog Supply Voltage. Independent +5 volt power connection to
analog comparator circuits.
Digital Supply Voltage. Independent +5 volt power connection to
digital error correction and output drivers.
Analog Ground. Connect to the system analog ground plane.
Digital Ground. Connect to the system analog ground plane.
Not Connected.
IN
conversion range.
Sampling involves an aperture time, the time during which
the track/hold is trying to capture the input signal and settle
on a dc value to hold. It is analogous to the shutter speed of a
camera: the shorter the aperture (or faster the shutter) the less
the signal will be blurred, and the less uncertainty there will
be in the quantized value.
For example, a 10 MHz sinewave with a 1V peak amplitude
(2Vp-p) has a maximum slew rate of 2πfA at zero crossing,
or 62.8V/µs. With an 8-bit A/D converter, q (the quantization
step size) = 2V/255 = 7.8mV. The input signal will slew one
LSB in 124ps. To limit the error (and noise) contribution due
to aperture effects to 1/2LSB, the aperture must be shorter
than 62ps.
7-0
are in a high-impedance state.
IN
conversion range.
T
is the top input to the reference
B
is the bottom input to the
T
defines the positive end
IN
is sampled on the
7-0
B
defines the
are enabled.
TMC1175A
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