am79c974 Advanced Micro Devices, am79c974 Datasheet - Page 26

• Manufacturer Part Number: am79c974
• Description: Pcnettm-scsi Combination Ethernet And Scsi Controller For Pci Systems
• Manufacturer: Advanced Micro Devices

BASIC FUNCTIONS
System Bus Interface Function
During normal operations the Am79C974 operates as a
bus master with a few slave l/O accesses for status and
control functions.
The Ethernet controller is initialized through a combina-
tion of PCI Configuration Space accesses, I/O space
Bus Slave accesses, Memory Space Bus Master ac-
cesses, and optional reads of an external serial
EEPROM. The EEPROM is read through the Microwire
interface either automatically by the Am79C974 or indi-
rectly by a series of bus slave accesses to one of the
Ethernet Bus Configuration Registers (BCRs). The
EEPROM normally contains the ISO 8802-3 (IEEE/
ANSI 802.3) Ethernet node address and data to be
loaded into some of the Ethernet BCRs.
The SCSI controller is initialized by bus slave writes to
SCSI Core and SCSI DMA registers.
Software Interface
The Am79C794 uses four address spaces: Ethernet
PCI configuration space, SCSI PCI configuration space,
I/O space, and memory space.
SCSI PCI configuration space is selected when the
IDSELA pin is active. Ethernet PCI configuration space
is selected when the IDSELB pin is active. The way that
IDSELA and IDSELB are controlled depends on exter-
nal hardware. Section 3.6.4.1 of the PCI Specification
recommends two methods of generating configuration
cycles called Configuration Mechanism #1 and Configu-
ration Mechanism #2.
The PCI Configuration Spaces are used by system soft-
ware to identify the SCSI and Ethernet controllers and to
set up device configuration without the use of jumpers.
Certain PCI configuration registers have read-only infor-
mation about the devices resource requirements. Other
registers are used as mail boxes that system configura-
tion software uses to inform other software what re-
sources have been allocated to the device. The only PCI
Configuration Registers that affect the operation of the
Am79C794 are the SCSI and Ethernet Base Address
Registers, which are found at offset 10h in each of the
two configuration spaces, and the Command Registers
at offset 4. Writing to these registers establishes the
base address of the SCSI l/O space and the base ad-
dress of the Ethernet I/O space.
The SCSI controller registers occupy 96 bytes of l/O
space that starts on whatever 128-byte boundary that is
programmed into the Base Address Register at offset
10h in the SCSI PCI Configuration Space. The Ethernet
controller registers occupy 32 bytes of l/O space that
starts on whatever 32-byte boundary that is pro-
grammed into the Base Address Register at offset 10h
in the Ethernet PCI Configuration Space. These
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AMD
P R E L I M I N A R Y
Am79C974
registers are used to set up controller operating modes,
to enable or disable various features, to start certain op-
erations, and to monitor operating status.
In addition to the registers in the l/O space, the Ethernet
controller uses certain data structures that are set up
(typically by the host computer) in normal memory
space. These data structures are (1) the initialization
block that contains configuration data that the Ethernet
controller automatically loads into its Configuration and
Status Registers (CSRs), (2) the Receive and Transmit
Descriptor Rings, that contain pointers to receive and
transmit buffers and status and control information
about these buffers, and (3) the receive and transmit
buffers. The Ethernet controller uses bus master ac-
cesses to read the locations of the buffers, to store
frames received from the network into the receive buff-
ers, and to transmit the contents of the transmit buffers.
Ethernet Interfaces
The Am79C974 controller can be connected to an 802.3
network via one of two network interfaces. The Attach-
ment Unit Interface (AUI) provides an ISO 8802-3
(IEEE/ANSI 802.3) compliant differential interface to a
remote MAU or an on-board transceiver. The
10BASE-T interface provides a twisted-pair Ethernet
port. While in auto-selection mode, the interface in use
is determined by an auto-sensing mechanism which
checks the link status on the 10BASE-T port. If there is
no active link status, then the device assumes an AUI
connection.
SCSI Interfaces
The Am79C974 acts as a bridge between the PCI and
SCSI buses. As the maximum data transfer rate on the
PCI bus is a very high 132 Mbyte/s compared with the
SCSI bus 10 Mbyte/s, buffering is required between the
two buses. The buffering is provided by two FIFOs: a
16-byte (16X8 bits) SCSI Core FIFO and an additional
96-byte (24X32 bits) DMA FIFO. These FIFOs provide a
temporary storage for all command, data, status and
message bytes as they are transferred between the
32-bit PCI bus and the 8-bit SCSI bus.
The Am79C974’s SCSI Core and DMA registers are ad-
dressed using the value in the Base Address Register
(offset 10h in the PCI Configuration Space). The SCSI
registers occupy 16 double words and the DMA engine
registers occupy 8 double word locations. The I/O ad-
dress map is as follows:
The PCI configuration space, Ethernet controller and
SCSI controller are described in detail in the following
sections.
Start Offset End Offset
0x0000
0x0040
0x003F
0x005F
Block Name
SCSI Core Reg
PCI DMA CCB
Size
16 DW/64B
8 DW/32B