am79c974 Advanced Micro Devices, am79c974 Datasheet - Page 90
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am79c974
Manufacturer Part Number
am79c974
Description
Pcnettm-scsi Combination Ethernet And Scsi Controller For Pci Systems
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C974.pdf
(153 pages)
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C/BE[3:0]
RST must be asserted low to start a NAND tree test se-
quence. Initially, all NAND tree inputs except RST
should be driven high. This will result in a high output at
the BUSY pin. If the NAND tree inputs are driven low in
the same order as they are connected to build the NAND
tree, BUSY will toggle every time an additional input is
driven low. BUSY will change to a ZERO, when INTA is
driven low and all other NAND tree inputs stay high.
BUSY will toggle back to high, when CLK is additionally
driven low. BUSY will continue toggling as long as the
NAND tree inputs are toggling in the sequence shown in
DEVSEL
90
AD[31:0]
IDSELA
FRAME
IDSELB
PWDN
REQB
REQA
GNTB
GNTA
PERR
SERR
TRDY
STOP
LOCK
BUSY
IRDY
INTA
INTB
RST
PAR
CLK
AMD
FFFFFFFF
F
Figure 28. NAND Tree Waveform
P R E L I M I N A R Y
7
Am79C974
Figure 28. BUSY will be high, when all NAND tree inputs
are driven low.
When testing is complete, deassert RST to exit this test
mode.
Note that some of the pins connected to the NAND tree
are outputs in normal mode of operation. They must not
be driven from an external source until the PCnet-SCSI
controller is configured for NAND tree testing.
0000FFFF
3
1
18681A-36
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