am79c930 Advanced Micro Devices, am79c930 Datasheet - Page 41

• Manufacturer Part Number: am79c930
• Description: Pcnet-mobile Single-chip Wireless Lan Media Access Controller
• Manufacturer: Advanced Micro Devices

some functionality is only available in PCMCIA mode.
Pin functionality is programmed according to the follow-
ing table:
Pin 142: TXCMD/LA21
The TXCMD/LA21 pin may be configured to operate as
input or output and may be configured to drive a trans-
ceiver control reference signal using one of two timing
sources plus input from the TXCMD bit of TIR11
(TIR11[0]). Note that some functionality is only available
in PCMCIA mode.
Pin functionality is programmed according to the
following table.
Pin 143: TXDATA/LA20
The TXDATA/LA20 pin may be configured to operate as
input or output and may be configured to drive inverted
transmit data. Note that some functionality is only
available in PCMCIA mode. Pin functionality is pro-
grammed according to the following table:
Pin 144: LLOCKE/SA15
The LLOCKE/SA15 pin may be configured to operate as
input or output. Note that some functionality is only avail-
able in PCMCIA mode. Pin functionality is programmed
according to the following table:
Pin Value
Pin Value
Pin Value
PCMCIA
PCMCIA
PCMCIA
0
1
1
1
1
0
1
1
1
1
0
1
1
1
TCR30[6]
ANTSEN
TXDLFN
TIR26[3]
TIR11[3]
RCEN
X
X
X
X
X
0
1
0
1
1
1
0
1
1
ANSLTLFN
TCR30[7]
TCR30[5]
TCR15[6]
TXCMFN
TXDLEN
X
X
X
X
X
0
1
1
0
0
1
1
0
1
ANTSLTLEN
TCR15[7]
TCR15[5]
TXDATA/
TXCMEN
LA20 Pin
Direction
P R E L I M I N A R Y
O
O
X
X
X
X
X
X
0
1
0
1
I
I
Am79C930
TXDATA/
ANTSLT/
LA23 Pin
Direction
LA21 Pin
Direction
LA20 Pin
TXCMD/
TXDATA
TCR7[0]
Note that a read of the ANTSLTD bit (TCR7[1]) will al-
ways give the current ANTSLT/LA23 pin value without
inversion, regardless of pin configuration setting.
Transmit state machine generated signals T1, T2, T3,
diagram in section Am79C930-Based TX Power
Ramp Control.
Note that a read of the TXCMDT bit (TCR7[2]) will al-
ways give the current TXCMD/LA21 pin value without
inversion, regardless of pin configuration setting.
The TXDATA signal is the inverse of the TXDATA signal
which is the TX data drawn from the TX FIFO using the
internal TX state machine control.
Note that a read of the TXDATALD bit (TCR7[0]) will al-
ways give the current TXDATA/LA20 pin value without
inversion, regardless of pin configuration setting.
Note that a read of the LLOCKE bit (TIR11[4]) will al-
ways give the current LLOCKE/SA15 pin value without
inversion, regardless of pin configuration setting.
TXP _ ON and O_TX have the timing indicated in the
Value
NA
NA
O
O
O
O
O
O
I
I
I
I
TIR26[4] (write)
TIR26[5] (read)
TIR11[0] + T1
(LA20 input function)
(from internal TX FIFO
using internal TX state machine timing)
ANTSLT/
LA23 Pin
LA21 Pin
TXCMD/
ANTSLT
TCR7[1]
TCR7[2]
Value
Value
O_TX
NA
NA
NA
NA
(LA23 input function)
(from internal antenna)
(diversity circuit)
(LA21 input function)
AMD
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