s71gl128nc0 Meet Spansion Inc., s71gl128nc0 Datasheet - Page 3

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s71gl128nc0

Manufacturer Part Number
s71gl128nc0
Description
Stacked Multi-chip Product Mcp 512/256/128 Megabit 32/16/8 M X 16-bit Cmos 3.0 Volt-only Mirrorbittm Page-mode Flash Memory With 64 Megabit 4m X 16-bit Psram
Manufacturer
Meet Spansion Inc.
Datasheet

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Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 90
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 91
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . .92
Key to Switching Waveforms . . . . . . . . . . . . . . . 92
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 93
Erase And Programming Performance . . . . . . 103
TSOP Pin and BGA Package Capacitance . . . . 103
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Functional Description . . . . . . . . . . . . . . . . . . . . 105
Power Down (for 32M, 64M Only) . . . . . . . . . . . 105
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 107
December 17, 2004 S71GL512_256_128NC0_00_A0
Read-Only Operations–S29GL128N, S29GL256N, S29GL512N ...........93
Hardware Reset (RESET#) ...............................................................................95
Erase and Program Operations–S29GL128N,
S29GL256N, S29GL512N .................................................................................. 96
Alternate CE# Controlled Erase and Program Operations-
S29GL128N, S29GL256N, S29GL512N .........................................................101
Power Down ...................................................................................................... 105
Power Down Program Sequence .................................................................106
Address Key .......................................................................................................106
Figure 8. Maximum Positive
Overshoot Waveform.......................................................... 90
Figure 9. Test Setup ........................................................... 92
Table 14. Test Specifications ............................................... 92
Figure 10. Input Waveforms and Measurement Levels............. 92
Figure 11. Read Operation Timings....................................... 94
Figure 12. Page Read Timings.............................................. 94
Figure 13. Reset Timings..................................................... 95
Figure 14. Program Operation Timings .................................. 97
Figure 15. Accelerated Program Timing Diagram .................... 97
Figure 16. Chip/Sector Erase Operation Timings..................... 98
Figure 17. Data# Polling Timings
(During Embedded Algorithms) ............................................ 99
Figure 18. Toggle Bit Timings (During Embedded Algorithms) 100
Figure 19. DQ2 vs. DQ6 .................................................... 100
Figure 20. Alternate CE# Controlled Write (Erase/
Program) Operation Timings.............................................. 102
pSRAM Type 7
A d v a n c e
I n f o r m a t i o n
Recommended Operating Conditions . . . . . . . . 107
Package Capacitance . . . . . . . . . . . . . . . . . . . . . 107
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . 108
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . 109
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 113
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 122
Read Operation .................................................................................................109
Write Operation ................................................................................................110
Power Down Parameters .................................................................................111
Other Timing Parameters .................................................................................111
AC Test Conditions ..........................................................................................112
AC Measurement Output Load Circuits ....................................................112
Read Timings ........................................................................................................ 113
Write Timings .....................................................................................................115
Read/Write Timings ..........................................................................................118
Figure 21. AC Output Load Circuit – 16 Mb .......................... 112
Figure 22. AC Output Load Circuit – 32 Mb and 64 Mb .......... 112
Figure 23. Read Timing #1 (Basic Timing)........................... 113
Figure 24. Read Timing #2 (OE# Address Access ................. 113
Figure 25. Read Timing #3 (LB#/UB# Byte Access).............. 114
Figure 26. Read Timing #4 (Page Address Access after CE1# Control
Access for 32M and 64M Only)........................................... 114
Figure 27. Read Timing #5 (Random and Page Address Access for
32M and 64M Only).......................................................... 115
Figure 28. Write Timing #1 (Basic Timing) .......................... 115
Figure 29. Write Timing #2 (WE# Control) .......................... 116
Figure 30. Write Timing #3-1(WE#/LB#/UB#
Byte Write Control) .......................................................... 116
Figure 31. Write Timing #3-3 (WE#/LB#/UB#
Byte Write Control) .......................................................... 117
Figure 32. Write Timing #3-4 (WE#/LB#/UB#
Byte Write Control) .......................................................... 117
Figure 33. Read/Write Timing #1-1 (CE1# Control).............. 118
Figure 34. Read / Write Timing #1-2
(CE1#/WE#/OE# Control) ................................................ 118
Figure 35. Read / Write Timing #2 (OE#, WE# Control)........ 119
Figure 36. Read / Write Timing #3
(OE#, WE#, LB#, UB# Control)......................................... 119
Figure 37. Power-up Timing #1 ......................................... 120
Figure 38. Power-up Timing #2 ......................................... 120
Figure 39. Power Down Entry and Exit Timing...................... 120
Figure 40. Standby Entry Timing after Read or Write ............ 121
Figure 41. Power Down Program Timing (for 32M/64M Only) . 121
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