s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 127

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s71pl129ja0

Manufacturer Part Number
s71pl129ja0
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
Notes:
1. 16Mb: A2 ~ A19, 32Mb: A2 ~ A20, 64Mb: A2 ~ A21, 128Mb: A2 ~ A22.
June 25, 2004 pSRAM_Type02_15A1
t
output voltage levels.
At any given temperature and voltage condition, t
to device interconnection.
t
If invalid address signals shorter than min. t
timing (t
HZ
OE
Write Timings
DQ15~DQ0
(max) is met only when OE# becomes enabled after t
Address
CS1#
CS2
UB#, LB#
WE#
Data in
Data out
and t
Address
A1~A0
RC
OHZ
CS1#
CS2
OE#
) or needs to sustain standby state for min. t
are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to
1)
Figure 48. Timing Waveform of Page Cycle (Page Mode Only)
A d v a n c e
Figure 49. Write Cycle #1 (WE# Controlled)
Data Undefined
High-Z
High Z
t
Address
AA
t
Address
t
AS
CO
Valid
Valid
I n f o r m a t i o n
RC
are continuously repeated for over 4µs, the device needs a normal read
Type 2 pSRAM
HZ
(Max.) is less than t
t
WHZ
t
RC
OE
AA
at least once in every 4µs.
t
AW
(max).
t
t
WC
CW
t
t
BW
WP
Data
Valid
Address
t
PA
Valid
t
LZ
PC
t
DW
(Min.) both for a given device and from device
Data Valid
Valid
Data
Address
Valid
t
WR
t
DH
Data
Valid
t
OW
Address
Valid
Valid
Data
High-Z
t
OHZ
127

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