s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 51

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s71pl129ja0

Manufacturer Part Number
s71pl129ja0
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
June 4, 2004 S29PL129J_MCP_00_A0
Password Program Command
Password Verify Command
Password Protection Mode Locking Bit Program Command
operation using the DQ7 or DQ6 status bits, just as in the standard Word Program
operation. See
In the erase-suspend-read mode, the system can also issue the autoselect com-
mand sequence. The device allows reading autoselect codes even at addresses
within erasing sectors, since the codes are not stored in the memory array. When
the device exits the autoselect mode, the device reverts to the Erase Suspend
mode, and is ready for another valid operation. See
dresses”
T o resume the sector erase operation, the system must write the Erase Resume
command (address bits are don’t care). The bank address of the erase-sus-
pended bank is required when writing this command. Further writes of the
Resume command are ignored. Another Erase Suspend command can be written
after the chip has resumed erasing.
The Password Program Command permits programming the password that is
used as part of the hardware protection scheme. The actual password is 64-bits
long. Four Password Program commands are required to program the password.
The system must enter the unlock cycle, password program command (38h) and
the program address/data for each portion of the password when programming.
There are no provisions for entering the 2-cycle unlock cycle, the password pro-
gram command, and all the password data. There is no special addressing order
required for programming the password. Also, when the password is undergoing
programming, Simultaneous Operation is disabled. Read operations to any mem-
ory location will return the programming status. Once programming is complete,
the user must issue a Read/Reset command to return the device to normal oper-
ation. Once the P assword is written and verified, the Password Mode Locking Bit
must be set in order to prevent verification. The P assword Program Command is
only capable of programming “0”s. Programming a “1” after a cell is programmed
as a “0” results in a time-out by the Embedded Program Algorithm™ with the cell
remaining as a “0”. The password is all ones when shipped from the factory. All
64-bit password combinations are valid as a password.
The Password Verify Command is used to verify the Password. The Password is
verifiable only when the P assword Mode Locking Bit is not programmed. If the
P assword Mode Locking Bit is programmed and the user attempts to verify the
P assword, the device will always drive all F’s onto the DQ data bus.
The P assword Verify command is permitted if the Secured Silicon sector is en-
abled. Also, the device will not operate in Simultaneous Operation when the
P assword Verify command is executed. Only the password is returned regardless
of the bank address. The lower two address bits (A1-A0) are valid during the
P assword Verify. Writing the Read/Reset command returns the device back to
normal operation.
The Password Protection Mode Locking Bit Program Command programs the
P assword Protection Mode Locking Bit, which prevents further verifies or updates
to the Password. Once programmed, the P assword Protection Mode Locking Bit
cannot be erased! If the P assword Protection Mode Locking Bit is verified as pro-
gram without margin, the Password Protection Mode Locking Bit Program
on page 29 and
A d v a n c e
“Write Operation Status”
“Autoselect Command Sequence”
I n f o r m a t i o n
S29PL129J for MCP
on page 56 for more information.
“Secured Silicon Sector Ad-
on page 46 for details.
51

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