emc2105 Standard Microsystems Corp., emc2105 Datasheet - Page 53

• Manufacturer Part Number: emc2105
• Description: Emc2105 Rpm-based High Side Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
ADDR
23h
22h
RPM-Based High Side Fan Controller with Hardware Thermal Shutdown
Datasheet
APPLICATION NOTE: If the TRIP_SET / VIN4 pin is configured to be used to set the Critical / Thermal Shutdown
APPLICATION NOTE: If the TRIP_SET / VIN4 pin is configured to be used to set the Critical / Thermal Shutdown
SMSC EMC2105
6.11
6.12
R/W
R-C
R/W
R/W
The Configuration 3 Register controls the four voltage input channels. This register is software locked.
Bit 6 - VIN4_INV - Determines whether the VIN4 channel data is inverted.
Bit 5 - VIN3_EN - Enables the voltage mode on the External Diode 3 channel.
Bit 4 - VIN3_INV - Determines whether the VIN3 channel data is inverted.
Bit 3 - VIN2_EN - Enables the voltage mode on the External Diode 2 channel.
Bit 2 - VIN2_INV - Determines whether the VIN2 channel data is inverted.
Bit 1 - VIN1_EN - Enables the voltage mode on the External Diode 1 channel.
Bit 0 - VIN1_INV - Determines whether the VIN1 channel data is inverted.
The Interrupt Status Register reports the operating condition of the EMC2105. If any of the bits are set
to a logic ‘1’ (other than TSD and HWS) then the ALERT# pin will be asserted low if the corresponding
channel is enabled. Reading from the status register clears all status bits if the error conditions is
removed. If there are no set status bits, then the ALERT# pin will be released.
The bits that cause the ALERT# pin to be asserted can be masked based on the channel they are
associated with unless stated otherwise.
Configuration 3 Register
Interrupt Status Register
‘0’ (default) - The VIN4 channel data is not inverted.
‘1’ - The VIN4 channel data is inverted. The data presented to the reading registers and compared
against the limits is determined as FFh - the measured input voltage.
‘0’ (default) - The External Diode 3 channel operates as a diode channel.
‘1’ - The External Diode 3 channel operates as a voltage input. The DP3 / DN4 / VREF_T3 pin
acts as a reference output voltage and the DN3 / DP4 /. VIN3 pin acts as a voltage input. This
overrides the APD bit in the Configuration 1 Register (20h).
REGISTER
REGISTER
Interrupt
Register
Config 3
Status
temperature associated with the External Diode 1 channel, then this bit cannot be set.
temperature associated with the External Diode 1 channel, then neither Bit 1 nor Bit 0 can
be set.
B7
-
B7
-
Table 6.16 Configuration 3 Register
Table 6.17 Interrupt Status Register
VIN4_I
TSD
B6
NV
B6
DATASHEET
TCRIT
VIN3
_EN
B5
B5
53
GPIO
VIN3
_INV
B4
B4
VIN2
_EN
FAN
B3
B3
VIN2
_INV
HIGH
B2
B2
VIN1
_EN
LOW
B1
B1
Revision 1.74 (05-08-08)
VIN1
_INV
FAULT
B0
B0
DEFAULT
DEFAULT
00h
00h