emc2105 Standard Microsystems Corp., emc2105 Datasheet - Page 71
![no-image](/images/no-image-200.jpg)
emc2105
Manufacturer Part Number
emc2105
Description
Emc2105 Rpm-based High Side Fan Controller With Hardware Thermal Shutdown
Manufacturer
Standard Microsystems Corp.
Datasheet
1.EMC2105.pdf
(91 pages)
- Current page: 71 of 91
- Download datasheet (2Mb)
ADDR
E5h
ADDR
E4h
ADDR
E3h
RPM-Based High Side Fan Controller with Hardware Thermal Shutdown
Datasheet
SMSC EMC2105
6.34
6.35
6.36
R/W
R/W
R/W
R/W
R/W
R
REGISTER
Interrupt
REGISTER
Enable
The GPIO Input Register indicates the state of the GPIO pin regardless of the direction of the GPIO
(input, push-pull output, open-drain output). When the GPIO is configured as an input, any change of
state will assert the ALERT# pin (unless GPIO interrupts are masked, see
The GPIO Output Register controls the state of theGPIO pin when it is configured as an output.
If the output is configured as an open-drain output, then it requires a pull-up resistor to VDD. Setting
the corresponding bit to a ‘1’ will act to disable the output allowing the pull-up resistor to pull the output
high. Setting the corresponding bit to a ‘0’ will enable the output and drive the pin to a logical ‘0’ state.
If the output is configured as a push-pull output, then output pin will immediately be driven to match
the corresponding bit setting.
The GPIO Interrupt Enable Register enables the GPIO to assert the ALERT pin when it changes state.
When the GPIO pin is disabled or configured as an output, then this bit is ignored.
Bit 0 - GPIO1_INT_EN - Allows the ALERT# pin to be asserted when the GPIO1 pin changes state
(when configured as an input).
GPIO Input Register
GPIO Output Register
GPIO Interrupt Enable Register
GPIO
Output 1
GPIO
‘0’ (default) - The ALERT# pin will not be asserted when the GPIO1 pin changes state (when
configured as an input).
‘1’ - The ALERT# pin will be asserted when the GPIO1pin changes state (when configured as an
input).
REGISTER
GPIO Input
B7
-
B7
-
B7
Table 6.52 GPIO Interrupt Enable Register
-
B6
Table 6.51 GPIO Output Register
-
Table 6.50 GPIO Input Register
B6
-
B6
-
DATASHEET
B5
-
B5
B5
-
-
71
B4
B4
-
-
B4
-
B3
-
B3
-
B3
-
B2
-
B2
-
B2
-
Section
B1
-
Revision 1.74 (05-08-08)
B1
B1
-
-
6.15).
GPIO
1_IN
B0
GPIO1
_OUT
GPIO1_
INT_EN
B0
B0
DEFAULT
00h
DEFAULT
DEFAULT
00h
00h
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