emc2105 Standard Microsystems Corp., emc2105 Datasheet - Page 60

• Manufacturer Part Number: emc2105
• Description: Emc2105 Rpm-based High Side Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
43h
Revision 1.74 (05-08-08)
6.20
R/W
R/W
2
0
1
1
1
1
Configuration
REGISTER
The Fan Configuration 2 Register controls the tachometer measurement and advanced features of the
RPM based Fan Speed Control Algorithm.
Bit 6 - EN_RRC - Enables ramp rate control when the corresponding fan driver is operated in the Direct
Setting Mode or the Direct Setting with LUT mode.
Bit 5 - GLITCH_EN - Disables the low pass glitch filter that removes high frequency noise injected on
the TACHx pin. If the LOWDRIVE bit is set, this bit is ignored and the filter is automatically disabled.
Bits 4 - 3 - DER_OPT[1:0] - Control some of the advanced options that affect the derivative portion of
the RPM based Fan Speed Control Algorithm as shown in
Fan Configuration 2 Register
‘0’ (default) - Ramp rate control is disabled. When the fan driver is operating in Direct Setting mode
or Direct Setting with LUT mode, the fan setting will instantly transition to the next programmed
setting.
‘1’ - Ramp rate control is enabled. When the fan driver is operating in Direct Setting mode or Direct
Setting with LUT mode, the fan drive setting will follow the ramp rate controls as determined by the
Fan Step and Update Time settings. The maximum fan drive setting step is capped at the Fan Step
setting and is updated based on the Update Time as given by
‘0’ - The glitch filter is disabled.
‘1’ (default) - The glitch filter is enabled.
Fan
2
UPDATE[2:0]
B7
-
1
1
0
0
1
1
Table 6.28 Fan Configuration 1 Register
Table 6.27 Update Time (continued)
RRC
EN_
B6
DATASHEET
GLITCH
RPM-Based High Side Fan Controller with Hardware Thermal Shutdown
_EN1
B5
60
0
1
0
1
0
1
DER_OPT [1:0]
B4
Table
B3
6.29.
Table
ERR_RNG[1:0]
400ms (default)
B2
UPDATE TIME
6.27.
1200ms
1600ms
500ms
800ms
B1
SMSC EMC2105
Datasheet
B0
-
DEFAULT
38h