emc2106 Standard Microsystems Corp., emc2106 Datasheet - Page 22

no-image

emc2106

Manufacturer Part Number
emc2106
Description
Emc2106 Dual Rpm-based Linear Fan Controller With Hardware Thermal Shutdown
Manufacturer
Standard Microsystems Corp.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
emc2106-DZK-TR
Manufacturer:
SMSC
Quantity:
20 000
Revision 1.74 (05-08-08)
4.7
4.8
4.9
‘0’ (GND)
‘Z’ (open)
‘1’ (VDD)
ADDR_SEL
The EMC2106 will respond to the ARA in the following way if the ALERT# pin is asserted.
1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication
2. Set the MASK bit to clear the ALERT# pin.
3. The ARA will NOT affect the OVERT1#, OVERT2#, and OVERT3# pins. These pins will be
The EMC2106 SMBus Address is determined by the status of the ADDR_SEL pin as shown in
Table
Attempting to communicate with the EMC2106 SMBus interface with an invalid slave address or invalid
protocol will result in no response from the device and will not affect its register contents.
The EMC2106 includes an SMBus time-out feature. Following a 30ms period of inactivity on the
SMBus, the device will time-out and reset the SMBus interface.
When configured to load from EEPROM (see
Master to read data from a connected EEPROM using the following procedure.
1. After power-up the EMC2106 waits for 10ms with the SMDATA and SMCLK pins tri-stated.
2. Once the wait period has elapsed, the EMC2106 sends a START signal followed by the 7 bit client
3. When the EEPROM sends the ACK signal, the EMC2106 will send a second start signal and
4. Resets the device as an SMBus Client with slave address 0101_111xb.
If the EMC2106 does not receive an acknowledge bit from the EEPROM then the following will occur:
1. The ALERT# pin will be asserted and will remain asserted until a Host device initiates
2. The EMC2106 will reset its SMBus protocol as a slave interface and start operating from the default
SMBus Address
SMBus Time-out
Programming from EEPROM
from the device was not prematurely stopped due to a bus contention event).
asserted as long as the error condition is present. When the error condition is removed, the pins
will be cleared.
address 1010 _000xb followed by a ‘0b’ and waits for an ACK signal from the EEPROM.
continue sending the Block Read Command (see
256 data bytes from the EEPROM sending an ACK between each data byte. When 256 data bytes
have been received, it sends a NACK signal followed by a STOP bit.
communication with the EMC2106 and reads the Status Register. The ALERT# pin will be de-
asserted after a single Status Register read.
conditions with slave address 0101_111xb.
4.7.
0101_111xb
0101_111xb
0101_110xb
Table 4.7 ADDR_SEL Pin Decode
SMBUS ADDRESS
DATASHEET
Dual RPM-Based Linear Fan Controller with Hardware Thermal Shutdown
22
Section
Table
4.7), the EMC2106 acts as a simple SMBus
4.8) to the same slave address. It reads
SMBus Client
EEPROM Programming
SMBus Client
FUNCTION
SMSC EMC2106
Datasheet

Related parts for emc2106