m36l0t8060b1 STMicroelectronics, m36l0t8060b1 Datasheet - Page 14
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m36l0t8060b1
Manufacturer Part Number
m36l0t8060b1
Description
256 Mbit 16 Mb , Multiple Bank, Multilevel, Burst Flash Memory And 64 Mbit Psram, 1.8 V Core, 3 V I/o Supply, Multichip Package
Manufacturer
STMicroelectronics
Datasheet
1.M36L0T8060B1.pdf
(22 pages)
Functional description
Table 2.
1. X = ‘don't care’
2. WAIT
3. L
4. Depends on G
5. Address bits are either at V
6. Power-down mode can be entered from standby state and all DQ pins are in High-Z state. Data retention depends on the
7. G
14/22
Flash read
Flash write
Flash address
latch
Flash output
disable
Flash standby
Flash reset
PSRAM read
PSRAM standby
(deselected)
PSRAM deep
power-down
PSRAM write
details.
power-down mode selected.
a. Write pulse is initiated by E1
b. G
Operation
F
P
can be tied to V
can be V
P
F
stays V
signal polarity is configured using the Set Configuration Register command. See the M30L0T8000x2 datasheet for
(6)
(5)
(5)
Main operating modes
IL
IL
F
during the write operation if the following conditions are satisfied:
.
during the entire write cycle.
V
V
V
V
V
E
X
The Flash memory must be disabled
The Flash memory must be disabled
IH
IH
IL
IL
IL
IL
F
if the valid address has been previously latched.
V
V
V
G
Any Flash mode is allowed.
X
X
X
IH
IH
IL
F
IL
W
V
V
V
V
or V
X
X
IH
IH
IH
P
IL
F
(E1
IH
V
V
but must be valid before PSRAM read or write operation.
P
V
L
IL
IL
X
X
X
controlled write timing), or cycle time of the previous operation cycle is satisfied;
IL
F
(3)
(3)
(1)
RP
V
V
V
V
V
V
IH
IH
IH
IH
IH
IL
F
WAIT
Hi-Z
Hi-Z
Hi-Z
F
(2)
E1
V
V
V
V
V
V
V
Any PSRAM mode is allowed.
X
IH
IL
IL
IL
IL
IL
IL
P
PSRAM must be disabled.
E2
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IH
IH
IL
P
W
V
V
V
V
V
V
X
X
IH
IH
IH
IL
IL
IL
P
V
V
V
G
V
V
V
IH
IH
IH
X
X
IL
IL
IL
P
M36L0T8060T1, M36L0T8060B1
(7)
(7)
(7)
LB
V
V
V
V
V
V
X
X
IH
IH
IL
IL
IL
IL
P
UB
V
V
V
V
V
V
X
X
IH
IH
IL
IL
IL
IL
P
Data input
Data input Data input
DQ0-DQ7 DQ8-DQ15
Flash data out or Hi-
Invalid
output
output
Data
Data
Hi-Z
Hi-Z
Hi-Z
Flash data out
Flash data in
Hi-Z
Hi-Z
Hi-Z
Z
(4)
Data output
Data output
Data input
Invalid
Hi-Z
Hi-Z
Hi-Z