k4t51043qe-zlcc Samsung Semiconductor, Inc., k4t51043qe-zlcc Datasheet - Page 15

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k4t51043qe-zlcc

Manufacturer Part Number
k4t51043qe-zlcc
Description
512mb E-die Ddr2 Sdram Specification
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
9.0 OCD default characteristics
Note :
1. Absolute Specifications (0°C ≤ T
2. Impedance measurement condition for output source dc current: VDDQ = 1.7V; VOUT = 1420mV; (VOUT-VDDQ)/Ioh must be less than 23.4 ohms for
values of VOUT between VDDQ and VDDQ- 280mV. Impedance measurement condition for output sink dc current: VDDQ = 1.7V; VOUT = 280mV;
VOUT/Iol must be less than 23.4 ohms for values of VOUT between 0V and 280mV.
3. Mismatch is absolute value between pull-up and pull-dn, both are measured at same temperature and voltage.
4. Slew rate measured from V
5. The absolute value of the slew rate as measured from DC to DC is equal to or greater than the slew rate as measured from AC to AC. This is guaran-
teed by design and characterization.
6. This represents the step size when the OCD is near 18 ohms at nominal conditions across all process and represents only the DRAM uncertainty.
Output slew rate load :
7. DRAM output slew rate specification applies to 400Mb/sec/pin, 533Mb/sec/pin, 667Mb/sec/pin and 800Mb/sec/pin speed bins.
8. Timing skew due to DRAM output slew rate mis-match between DQS / DQS and associated DQs is included in tDQSQ and tQHS specification.
K4T51043QE
K4T51083QE
K4T51163QE
Output impedance
Output impedance step size for OCD calibration
Pull-up and pull-down mismatch
Output slew rate
Description
IL
(AC) to V
CASE
≤ +95°C; VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V)
IH
(AC).
(VOUT)
Output
Parameter
Sout
15 of 45
VTT
25 ohms
See full strength default driver characteristics
Min
1.5
0
0
Reference
Point
Normal 18ohms
Nom
Max
1.5
4
5
DDR2 SDRAM
Rev. 1.8 July 2007
ohms
ohms
ohms
V/ns
Unit
1,4,5,6,7,8
Notes
1,2,3
1,2
6

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