m470l1624bt0 Samsung Semiconductor, Inc., m470l1624bt0 Datasheet - Page 11

• Manufacturer Part Number: m470l1624bt0
• Description: 128mb Ddr Sdram Module
• Manufacturer: Samsung Semiconductor, Inc.

M470L1624BT0
6. Input Setup/Hold Slew Rate Derating
7. I/O Setup/Hold Slew Rate Derating
8. I/O Setup/Hold Plateau Derating
9. I/O Delta Rise/Fall Rate(1/slew-rate) Derating
10. This parameter is fir system simulation purpose. It is guranteed by design.
11. For each of the terms, if not already an integer, round to the next highest integer. tCK is actual to the system clock cyc le time.
<Note>
The following table specifies derating values for the specifications listed if the single-ended clock skew rate is less than 1.0V/ns.
This derating table is used to increase t
This derating table is used to increase t
based on the lesser of AC-AC slew rate and DC-DC slew rate.
based on the lesser of AC-AC slew rate and DC-DC slew rate.
This derating table is used to increase tDS/tDH in the case where the input level is flat below VREF 310mV for a duration of
This derating table is used to increase t
up to 2ns.
is calated as 1/SlewRate1-1/SlewRate2. For example, if slew rate 1 = 5V/ns and slew rate 2 =.4V/ns then the Delta Rise/Fall
Rate =-0/5ns/V. Input S/H slew rate based on larger of AC-AC delta rise/fall rate and DC-DC delta rise/fall rate.
Input Setup/Hold Slew Rate
I/O Setup/Hold Slew Rate
(Single ended)
CK slew rate
Delta Rise/Fall Rate
0.75V/ns
1.0V/ns
0.5V/ns
I/O Input Level
(V/ns)
(V/ns)
(ns/V)
(mV)
0.5
0.4
0.3
0.5
0.4
0.3
0.25
0.5
280
0
tIH/tIS
+100
(ps)
+50
0
DS
IS
DS
/t
/t
/t
+100
IH
+150
+100
DH
(ps)
+50
(ps)
+75
(ps)
+50
(ps)
+50
DH
tDS
tDS
tDS
tIS
0
0
0
in the case where the input slew rate is below 0.5V/ns. Input setup/hold slew rate
in the case where the I/O slew rate is below 0.5V/ns. I/O setup/hold slew rate
in the case where the DQ and DQS slew rates differ. The Delta Rise/Fall Rate
tDSS/tDSH
+100
(ps)
+50
0
+100
+150
+100
(ps)
+50
(ps)
+75
(ps)
+50
(ps)
+50
tDH
tDH
tDH
tIH
0
0
0
tAC/tDQSCK
+100
(ps)
+50
0
200pin DDR SDRAM SODIMM
tLZ(min)
-100
(ps)
-50
0
tHZ(max)
Rev. 0.2 Dec. 2001
+100
(ps)
+50
0