mt9v034c12stmdes aptina, mt9v034c12stmdes Datasheet - Page 25

• Manufacturer Part Number: mt9v034c12stmdes
• Description: 1/3-inch Wide-vga Cmos Digital Image Sensor
• Manufacturer: aptina

Shadowed Register
Table 9:
PDF: 09005aef8366edcb/Source: 09005aef8366ede5
MT9V034_DS - Rev. A 10/08 EN
0x00/0xFF (0/255) Chip Version
0x01 (1) Column Start Context A
0x02 (2) Row Start Context A
0x03 (3) Window Height Context A
0x04 (4) Window Width Context A
0x05 (5) Horizontal Blanking Context A
15:0
9:0
8:0
8:0
9:0
Bit
Chip Version
Column Start
Row Start
Window Height
Window Width
Bit Name
Register Descriptions
Chip version—read-only
The first column to be read out (not counting dark
columns that may be read). To window the image
down, set this register to the starting X value.
Readable/active columns are 1–752.
The first row to be read out (not counting any dark
rows that may be read). To window the image down,
set this register to the starting Y value.
Setting a value less than four is not recommended
since the dark rows should be read using R0x0D.
Number of rows in the image to be read out (not
counting any dark rows or border rows that may be
read).
Number of columns in image to be read out (not
counting any dark columns or border columns that
may be read).
Some sensor settings cannot be changed during frame readout. For example, changing
Window Width R0x04 part way through frame readout results in inconsistent LV
behavior. To avoid this, the MT9V034 double-buffers many registers by implementing a
“pending” and a “live” version. Two-wire serial interface reads and writes access the
pending register. The live register controls the sensor operation. The value in the
pending register is transferred to a live register at a fixed point in the frame timing, called
“frame-start.” Frame-start is defined as the point at which the first dark row is read out.
By default, this occurs four row times before FRAME_VALID (FV) goes HIGH. To deter-
mine which registers or register fields are double-buffered in this way, see the “Shad-
owed” column in Table 9.
Notation used in the register description table:
• Shadowed
• Read/Write
Table 9 provides a detailed description of the registers. Bit fields that are not identified in
the table are read only.
N = No. The register value is updated and used immediately.
Y = Yes. The register value is updated at next frame start. Frame start is defined as
when the first dark row is read out. By default this is four rows before FV goes HIGH.
R = Read-only register/bit.
W = Read/Write register/bit.
Bit Description
Aptina Confidential and Proprietary
25
MT9V034: 1/3-Inch Wide-VGA Digital Image Sensor
Default in
Hex (Dec)
0x1324
(4900)
(480)
(752)
001
004
1E0
2F0
(1)
(4)
Aptina Imaging reserves the right to change products or specifications without notice.
Shadowed
N
N
Y
Y
©2008 Aptina Imaging Corporation. All rights reserved.
Values
1–752
4–482
1–480
1–752
Legal
(Dec)
Registers
Read/
Write
W
W
W
W
R