mt9v034c12stmdes aptina, mt9v034c12stmdes Datasheet - Page 56

• Manufacturer Part Number: mt9v034c12stmdes
• Description: 1/3-inch Wide-vga Cmos Digital Image Sensor
• Manufacturer: aptina

ADC Companding Mode
Figure 23:
PDF: 09005aef8366edcb/Source: 09005aef8366ede5
MT9V034_DS - Rev. A 10/08 EN
12- to 10-Bit Companding Chart
For context A these become:
t
t
t
For context B these are:
t
t
t
In all cases above, the coarse component of total integration time may be based on the
result of AEC or values in Reg0x0B and Reg0xD2, depending on the settings.
Similar to Fine Shutter Width Total registers, the user must not set the Fine Shutter
Width 1 or Fine Shutter Width 2 register to exceed the row time (Horizontal Blanking +
Window Width). The absolute maximum value for the Fine Shutter Width registers is
1774 master clocks.
By default, ADC resolution of the sensor is 10-bit. Additionally, a companding scheme of
12-bit into 10-bit is enabled by the ADC Companding Mode register. This mode allows
higher ADC resolution, which means less quantization noise at low-light, and lower
resolution at high light, where good ADC quantization is not so critical because of the
high level of the photon’s shot noise.
1 = R0x08 + R0xD3
2 = R0x09 - R0x08 + R0xD4 – R0xD3
3 = R0x0B + R0xD4 –
1 = R0xCF + R0xD6
2 = R0xD0 - R0xCF + R0xD7 - R0xD6
3 = R0xD2 + R0xD8 -
1,024
10-bit
Codes
768
512
256
256
512
No companding (256
Aptina Confidential and Proprietary
1,024
2 to 1 Companding (256
t
t
1 -
1 –
4 to 1 Companding (1,536
t
2
2,048
t
2
56
256)
8 to 1 Companding (2,048
MT9V034: 1/3-Inch Wide-VGA Digital Image Sensor
128)
4,096
384)
Aptina Imaging reserves the right to change products or specifications without notice.
12-bit
Codes
256)
©2008 Aptina Imaging Corporation. All rights reserved.
Feature Description
(EQ 11)
(EQ 12)
(EQ 13)
(EQ 14)
(EQ 15)
(EQ 16)