mt9v034c12stmdes aptina, mt9v034c12stmdes Datasheet - Page 50

no-image

mt9v034c12stmdes

Manufacturer Part Number
mt9v034c12stmdes
Description
1/3-inch Wide-vga Cmos Digital Image Sensor
Manufacturer
aptina
Datasheet
Figure 18:
Signal Path
Figure 19:
On-Chip Biases
ADC Voltage Reference
PDF: 09005aef8366edcb/Source: 09005aef8366ede5
MT9V034_DS - Rev. A 10/08 EN
Slave Mode Operation
Signal Path
STFRM_OUT
LINE_V ALID
STLN_OUT
Exposure
LED_OUT
The MT9V034 signal path consists of a programmable gain, a programmable analog
offset, and a 10-bit ADC. See “Black Level Calibration” on page 59 for the programmable
offset operation description.
The ADC voltage reference is programmed through R0x2C, bits 2:0. The ADC reference
ranges from 1.0V to 2.1V. The default value is 1.4V. The increment size of the voltage
reference is 0.1V from 1.0V to 1.6V (R0x2C[2:0] values 0 to 6). At R0x2C[2:0] = 7, the refer-
ence voltage jumps to 2.1V.
It is very important to preserve the correct values of the other bits in R0x2C. The default
register setting is 0x0004. This corresponds to 1.4V—at this setting 1mV input to the ADC
equals approximately 1 LSB.
(output)
(input)
(output)
(input)
(input)
Voltage (R0x48 or
Offset Correction
result of BLC)
(reset minus signal)
Pixel Output
Aptina Confidential and Proprietary
Integration T ime
Σ
50
C1
MT9V034: 1/3-Inch Wide-VGA Digital Image Sensor
C2
(R0x35 or R0x36 or
Gain Selection
result of AGC)
Aptina Imaging reserves the right to change products or specifications without notice.
Vertical Blanking
10 (12) bit ADC
©2008 Aptina Imaging Corporation. All rights reserved.
(R0x2C)
V
REF
Feature Description
ADC Data
(9:0)

Related parts for mt9v034c12stmdes