ppc440spe Applied Micro Circuits Corporation (AMCC), ppc440spe Datasheet - Page 68

• Manufacturer Part Number: ppc440spe
• Description: Powerpc 440spe Embedded Processor
• Manufacturer: Applied Micro Circuits Corporation (AMCC)

PowerPC 440SPe Embedded Processor
Table 14. I/O Specifications—All Speeds (Sheet 2 of 2)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133.33MHz. PCI-X input setup time requirement is 1.2ns for 133.33MHz
3. These are DDR signals that can change on both the positive and negative clock transitions.
68
EMCTxEn
EMCTxErr
Internal Peripheral Interface
IIC0SClk
IIC0SDA
IIC1SClk
IIC1SDA
UARTSerClk
UART0_Rx
UART0_Tx
UART0_DCD
UART0_DSR
UART0_CTS
UART0_DTR
UART0_RI
UART0_RTS
UART1_Rx
UART1_Tx
UART1_DSR/CTS
UART1_DTR/RTS
UART2_Rx
UART2_Tx
Interrupts Interface
IRQ0:15
JTAG Interface
TDI
TMS
TDO
TCK
TRST
System Interface
Halt
GPIO00:31
SysClk
SysErr
SysReset
HISRRst
TESTEN
TmrClk
Trace Interface
TrcClk
TRCBS0:2
TrcES0:4
TrcTS0:6
and 1.7ns for 66.66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66.66MHz. PCI output hold time
requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
Signal
Setup Time
(T IS min)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
na
na
na
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Input (ns)
Hold Time
(T IH min)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
na
na
na
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Valid Delay
(T OV max)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
15
15
na
na
na
na
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Output (ns)
Hold Time
(T OH min)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
na
na
na
na
2
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(minimum)
Output Current (mA)
I/O H
19.1
19.1
15.3
15.3
15.3
15.3
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
n/a
n/a
n/a
n/a
n/a
n/a
na
na
na
na
-
-
Preliminary Data Sheet
(minimum)
I/O L
10.2
10.2
10.2
10.2
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
8.7
n/a
8.7
n/a
8.7
n/a
8.7
n/a
8.7
n/a
n/a
8.7
8.7
8.7
8.7
na
na
na
na
-
-
Revision 1.23 - Sept 21, 2006
UARTSerClk
UARTSerClk
UARTSerClk
UARTSerClk
UARTSerClk
UARTSerClk
EMCTxClk
EMCTxClk
IIC0SClk
IIC0SClk
Clock
async
async
async
async
async
async
async
async
async
async
async
async
async
async
async
async
async
async
async
async
na
na
AMCC Proprietary
Notes