ia3513 integration, ia3513 Datasheet - Page 13

• Manufacturer Part Number: ia3513
• Description: Headset Voice And Power Solution
• Manufacturer: integration

IA3513
HOST SYSTEM RESET - CLK32POG
Description
The IA3513 has the ability to reset the host in order to enforce safe startup operation, to do this the Clk32PoG pin of the IA3513
should be connected to the host reset pin.
Startup
The Clk32PoG pin stays low while the host supply voltage supplied by the IA3513 DC-DC is below 90% of its final value or the
32kHz clock is not available at the Clk32Out pin. With this logic functionality the host is guaranteed not to startup before the
clock is available and the supply voltage is stable.
Start of Charge
Besides the startup functionality the Clk32PoG can also be used to reset the host during normal operation. This functionality is
based on the charger start of charge event and interruption acknowledge mechanism.
The charge event is notified trough the standard IA3513 interruption mechanism and the status bit for this interruption is bit CHI
on register 10.
If the interruption is not acknowledged within a 100ms period after the notification the IA3513 will reset the host.
The reset cycle is done by puling low the Clk32Pog during two cycles of the 32kHz clock.
A charge restart event does not trigger the interruption.
Software RESET
The Clk32PoG pin can be pulled low by register write.
This functionality is aimed for the production stage of the application, if there is a specific need for the primary host to be shut
down in order for a secondary host to take control of the I2C bus (e.g. to program an E2PROM).
The reset control bit is bit 7 of register 49. This bit must be set to 1 to originate a reset (Clk32PoG low) and then set to 0 to
release the reset (Clk32PoG high).
A software reset is triggered by the primary master and then released by the secondary master.
In order to avoid accidental write to this register position, register 49 is protected by a code word.
To enable access to this register, the “01101001” word must be written to register 48, any write to register 48 with a different
content will disable the access to register 49.
External RESET
The Clk32PoG output pin has pull-up capability limited to 1mA.This makes possible the external pull down of the Clk32PoG pin.
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