hi-6110 Holt Integrated Circuits, Inc., hi-6110 Datasheet - Page 36

• Manufacturer Part Number: hi-6110
• Description: Bc / Rt / Mt Message Processor
• Manufacturer: Holt Integrated Circuits, Inc.

REVISION HISTORY
Revision
DS-6110, Rev. L
Date
05/01/08
Page Description of Change
13
24
24
26
32
36
1
7
Date was “February 2008”, is “May 2008”. Footer was “Rev. K”, is “Rev. L”.
Error Register bit 4 was “Gap Error”, is “Not used. This bit is set to “0”.”
“Transmit Data FIFO” and “Reset Transmit data FIFO” text description was
revised for clarity. Added “FIFO is cleared ... at assertion of VALMESS or
ERROR outputs, ...”. Added “See Electrical Characteristics” for special timing
requirements when writing to register address X010 to reset the FIFO.”
“Status Word 1 Register” Last sentence in text was “For non-broadcast RT-RT
commands, ... sent by the receiving remote terminal.” This now reads,
“For RT to RT messages, ... sent by the transmitting Remote Terminal.”
“Status Word 2 Register” Last sentence in text was “ ... sent by the transmitting
remote terminal.” This now reads, “... sent by the receiving Remote Terminal.”
“Bus Monitor Operation (MT Mode)” Added last two paragraphs describing
handling of same-bus superseding commands following RT-RT commands.
Table “DATA BUS TIMING - WRITE”. Added new line for Address Write Hold
Time t
Added “REVISION HISTORY” table.
HOLT INTEGRATED CIRCUITS
AWH
= 100 ns minimum for writes to register address X010 only.
HI-6110
36