m28f410 STMicroelectronics, m28f410 Datasheet

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m28f410

Manufacturer Part Number
m28f410
Description
4 Megabit X8 Or X16, Block Erase Flash Memory
Manufacturer
STMicroelectronics
Datasheet
Table 1. Signal Names
March 1995
This is preliminary infor mationon a new product now in developmen t or undergoing evaluation. Details are subject to change without notice.
A0-A17
DQ0-DQ7
DQ8-
DQ14
DQ15A-1
E
G
W
BYTE
RP
V
V
– One 16K Byte or 8K Word Boot Block (top or
– Two 8K Byte or 4K Word Key Parameter
– One 96K Byte or 48K Word Main Block
– Three 128K Byte or 64K Word Main Blocks
– 60µA Typical in Standby
– 0.2µA Typical in Deep Power Down
– 20/25mA Typical Operating Consumption
DUAL x8 and x16 ORGANIZATION
SMALL SIZE PLASTIC PACKAGES TSOP56
and SO44
MEMORY ERASE in BLOCKS
5V ± 10% SUPPLY VOLTAGE
12V ± 5% PROGRAMMING VOLTAGE
100,000 PROGRAM/ERASE CYCLES
PROGRAM/ERASE CONTROLLER
AUTOMATIC STATIC MODE
LOW POWER CONSUMPTION
HIGH SPEED ACCESS TIME: 70ns
EXTENDED TEMPERATURE RANGES
PP
CC
bottom location) with hardware write and
erase protection
Blocks
(Byte/Word)
Address Inputs
Data Input / Outputs
Data Input / Outputs
Data Input/Output or Address Input
Chip Enable
Output Enable
Write Enable
Byte/Word Organization
Reset/Power Down/Boot Block Unlock
Program & Erase Supply Voltage
Supply Voltage
4 Megabit (x8 or x16, Block Erase) FLASH MEMORY
Figure 1. Logic Diagram
A0-A17
RP
W
TSOP56 (N)
G
E
14 x 20mm
18
V CC
V SS
M28F410
M28F420
V PP
44
PRELIMINARY DATA
M28F410
M28F420
15
SO44 (M)
1
DQ15A-1
DQ0-DQ14
BYTE
AI01130C
1/38

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m28f410 Summary of contents

Page 1

... This is preliminary infor mationon a new product now in developmen t or undergoing evaluation. Details are subject to change without notice. M28F410 M28F420 PRELIMINARY DATA 44 TSOP56 ( 20mm Figure 1. Logic Diagram A0-A17 15 RP M28F410 M28F420 SO44 (M) DQ15A-1 DQ0-DQ14 BYTE AI01130C 1/38 ...

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... A10 A11 A12 A13 A14 A15 A16 M28F410 E 12 M28F420 33 BYTE DQ15A DQ7 16 29 DQ14 17 28 DQ6 18 27 DQ13 19 26 DQ5 20 25 DQ12 21 24 DQ4 22 23 ...

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... Device Code M28F420 Note DESCRIPTION The M28F410 and M28F420 FLASH MEMORIES are non-volatile memories that may be erased electrically at the block level and programmed by byte or word. The interface is directly compatible with most microprocessors. SO44 and TSOP56 packages are used. Organization The organization, as 512K 256K x 16, is selectable by an external BYTE signal ...

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... X 0D0h IH Block’ of 96K Bytes or 48K Words, and three ’Main Blocks’of 128KBytes or 64K Words. The M28F410 memory has the Boot Block at the top of the mem- ory address space (3FFFFh) and the M28F420 locates the Boot Block starting at the bottom (00000h). Erasure of each block takes typically 1 second and each block can be programmed and erased over 100,000 cycles ...

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... Power Saving The M28F410 and M28F420 have a number of power saving features. A CMOS standby mode is entered when the Chip Enable E and the Re- set/Power Down (RP) signals are at V supply current drops to typically 60µA. A deep ...

Page 6

Table 8. AC Measurement Conditions Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages Figure 3. AC Testing Input Output Waveform SRAM Interface 3V 0V EPROM Interface 2.4V 0.45V (1) Table 9. Capacitance (T = ...

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Table 10. DC Characteristics ( 70° 5V±10% or 5V± Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO ( Supply Current (Read Byte-wide) TTL CC (1, ...

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Table 11. DC Characteristics (T = –40 to 85° 5V±10% or 5V± Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO ( Supply Current (Read Byte-wide) TTL CC (1, ...

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Table 12. DC Characteristics (T = –40 to 125° 5V±10% or 5V± Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO ( Supply Current (Read Byte-wide) TTL CC (1, ...

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... AXQX OH to Output Transition Notes: 1. See Figure 3 and Table 8 for timing measurements. 2. Sampled only, not 100% tested may be delayed ELQV 10/38 (1) = 12V ± 5%) PP M28F410 / 20 -70 - ± ± 10 SRAM EPROM Interface Interface Min Max ...

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... Output Hi-Z Address Transition ( AXQX OH to Output Transition Notes: 1. See Figure 3 and Table 8 for timing measurements. 2. Sampled only, not 100% tested may be delayed ELQV (1) M28F410 / 20 -80 - ± ± 10 SRAM EPROM Interface Interface Min Max ...

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Figure 5. Read Mode AC Waveforms 12/38 ...

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... ± 10 SRAM EPROM Interface Interface Max Min Max Min (1) M28F410 / 20 -80 - ± ± 10 SRAM EPROM Interface Interface Max Min Max Min ...

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Figure 6. BYTE Mode AC Waveforms, BYTE Low to High A0-A17 E BYTE DQ0-DQ14 VALID A-1 DQ15A-1 Note: G Low High, other timings as Read Mode AC waveforms. Figure 7. BYTE Mode AC Waveforms, BYTE High to Low ...

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... Time is measured to Status Register Read giving bit b7 = ’1’. 3. For Program or Erase of the Boot Block RP must Time required for Relocking the Boot Block. 5. Sampled only, not 100% tested. = 12V ± 5%) PP Parameter V Low (1) M28F410 / 20 -70 - ± ± 10 SRAM EPROM Interface Interface Min ...

Page 16

... For Program or Erase of the Boot Block RP must Time required for Relocking the Boot Block. 5. Sampled only, not 100% tested. 16/38 = 12V ± 5%) PP Parameter V Low (1) M28F410 / 420 -100 -120 = 5V ± 10 ± 10 EPROM EPROM Interface Interface Min Max ...

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... Time is measured to Status Register Read giving bit b7 = ’1’. 3. For Program or Erase of the Boot Block RP must Time required for Relocking the Boot Block. 5. Sampled only, not 100% tested. Parameter V Low (1) M28F410 / 20 -80 - ± ± 10 SRAM EPROM Interface ...

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... Time is measured to Status Register Read giving bit b7 = ’1’. 3. For Program or Erase of the Boot Block RP must Time required for Relocking the Boot Block. 5. Sampled only, not 100% tested. 18/38 Parameter V Low (1) M28F410 / 420 -100 -120 = 5V ± 10 ± 10 EPROM EPROM Interface Interface ...

Page 19

Figure 8. Program & Erase AC Waveforms, W Controlled 19/38 ...

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... Time required for Relocking the Boot Block. 5. Sampled only, not 100% tested. 20/38 (1) = 12V ± 5%) PP Parameter V CC Min 70 210 100 100 10 0.3 0.3 0.6 Low M28F410 / 20 -70 - ± ± 10% CC SRAM EPROM Interface Interface Max Min Max 80 210 100 100 ...

Page 21

... Sampled only, not 100% tested. (1) = 12V ± 5%) PP Parameter V CC Min 100 210 100 100 10 0.4 0.4 0.7 Low M28F410 / 420 -100 -120 = 5V ± 10 ± 10% CC EPROM EPROM Interface Interface Max Min Max 120 210 100 ...

Page 22

... Time required for Relocking the Boot Block. 5. Sampled only, not 100% tested. 22/38 (1) Parameter V CC Interface Min 80 210 100 100 10 6 0.3 0.3 0.6 0 Low M28F410 / 20 -80 -90 Unit = 5V ± ± 10% CC SRAM EPROM Interface Max Min Max 90 ns 210 ...

Page 23

... Sampled only, not 100% tested. (1) Parameter V CC EPROM Interface Min 100 210 100 100 10 7 0.4 0.4 0.7 0 Low M28F410 / 420 -100 -120 Unit = 5V ± 10 ± 10% CC EPROM Interface Max Min Max 120 ns 210 ...

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Figure 9. Program & Erase AC Waveforms, E Controlled 24/38 ...

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... V Supply Voltage the main circuit supply Ground the reference for all voltage SS measurements. M28F410 / 420 Unit Typ Max 1.2 4.2 sec 0.6 2.1 sec 1 7 sec 2.4 14 sec M28F410 / 420 Unit Typ Max 1.4 5 sec 0.7 2.5 sec 1.5 10.5 sec 3 18 sec 25/38 ...

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... MAIN BLOCK 00000h Memory Blocks The memory blocks of the M28F410 and M28F420 are shown in Figure 10. The differencebetween the two productsis simply an inversion of the block map to position the Boot Block at the top or bottom of the memory. The selection of the Boot Block at the top or bottom of the memory depends on the microprocessor needs ...

Page 27

... The manufacturer code, 20h, is output when the address line A0 is Low, and the device code, 0F2h for the M28F410 or 0FAh for the M28F420, when A0 is High update the latch ...

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Erase (EE) instruction. This instruction uses two write operations. The first command written is the Erase Set-up command 20h. The second com- mand is the Erase Confirm command 0D0h. During the input of the second command an address of the ...

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... Interface must be reset by a Clear Status Register Instruction before data can be accessed. Automatic Power Saving The M28F410 and M28F420 memories place themselves in a lower power state when not being accessed. Following a Read operation, after a delay equal to the memory access time, the Supply ...

Page 30

Figure 11. Program Flow-chart and Pseudo Code Start Write 40h Command Write Address & Data Read Status Register YES YES YES End Notes: 1. Status check of b3 ...

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Figure 12. Erase Flow-chart and Pseudo Code Start Write 20h Command Write Block Address & 0D0h Command Read Status Register YES YES NO b4 YES ...

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Figure 13. Erase Suspend & Resume Flow-chart and Pseudo Code Start Write 0B0h Command Read Status Register YES YES Write 0FFh Command Read data from another block Write 0D0h Command Erase Continues ...

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Figure 14. Command Interface and Program Erase Controller Flow-diagram (a) WAIT FOR COMMAND WRITE (1) NO 90h YES BYTE 70h IDENTIFIER YES READ STATUS READ STATUS B Notes command is written, the Command Interface remains in its ...

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Figure 15. Command Interface and Program Erase Controller Flow-diagram ( YES READ STATUS NO READ ARRAY Note: 2. P/E.C. status (Ready or Busy) is read on Status Register bit 7. 34/38 ERASE YES READY YES ERASE SUSPEND YES ...

Page 35

... Bottom Boot Speed -70 70ns -80 80ns -90 90ns -100 100ns -120 120ns For a list of available options (V CC Shortform catalogue. For further information on any aspect of this device, please contact SGS-THOMSON Sales Office nearest to you. M28F410 - Power Supplies blank V ± 10 ± ± ...

Page 36

TSOP56 - 56 lead Plastic Thin Small Outline 20mm Symb Typ 0.50 L α TSOP56 1 N/2 TSOP-a Drawing is not to scale 36/38 mm Min Max ...

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SO44 - 44 lead Plastic Small Outline, 525 mils body width Symb Typ 1. 0.80 3° α SO44 SO-b Drawing is not to ...

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Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its ...

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