tmxf84622 ETC-unknow, tmxf84622 Datasheet - Page 39

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tmxf84622

Manufacturer Part Number
tmxf84622
Description
Tmxf84622 Mbits/s/622 Mbits/s Interface Sonet/sdh X84/x63 Ultramapper
Manufacturer
ETC-unknow
Datasheet
Advance Data Sheet, Rev. 2
July 2001
3 Pin Information
Table 1. Pin Descriptions (continued)
* O
Agere Systems Inc.
I/O
I
I
D
U
1
; I/O
indicates internal pull-up.
2
indicates external pull-up recommended (unused or system required),
AG29
AK30
AK32
AJ32
AL33
indicates external pull-down recommended (unused or system required),
Pin
F5
F6
C1
D2
H6
E3
D
indicate internal pull-down,
CG_PLLCLKOUT
MODE2_PLL
MODE0_PLL
MODE1_PLL
CLKIN_PLL
MPMODE
Symbol
MPCLK
ADSN
RWN
CSN
DSN
(continued)
Type
Microprocessor Interface (49)
I/O*
I
I
I
I
I
O
D
D
D
D
I
I
U
I
I
I
Framer PLL (4)
PLL Clock Input.
Clock generation for Framer 3.3 V PLL.
PLL Control Input for Mode 2/Testmode Output.
PLL Control Input for Mode 0.
PLL Control Input for Mode 1.
Synchronous Microprocessor Clock (when MPMODE = 1).
The maximum clock frequency is 66 MHz. This clock is required
to properly sample address, data, and control signals from the
microprocessor in both asynchronous and synchronous modes
of operation. This clock must be within the range of 16 MHz to
66 MHz.
Microprocessor Mode Select. If the microprocessor interface
is synchronous, MPMODE should be set to 1. If the micropro-
cessor interface is asynchronous, MPMODE should be set to 0.
Chip Select (Active-Low). For synchronous mode, it should be
stable beyond a certain setup time before the rising clock edge
when ADSN is active. For asynchronous mode, it should be sta-
ble before DSN is asserted.
Address Strobe (Active-Low). Active-low address strobe that
is a one MPCLK cycle wide pulse for synchronous mode and
active for the entire read/write cycle for asynchronous mode.
Address bus signals, ADDR(20:0), are transparently latched into
Ultramapper when ADSN is low. The address bus should
remain valid for the duration of ADSN.
Read/Write Cycle Selection. RWN is set high for a read opera-
tion, or set low for write operation.
Data Strobe (Active-Low). DSN is not used for synchronous
mode. For asynchronous mode, write operation, DSN becomes
active after data is stable. For read operation, it is similar to
ADSN.
TMXF84622 155 Mbits/s/622 Mbits/s Interface
SONET/SDH x84/x63 Ultramapper
Description
39

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