m35b32 STMicroelectronics, m35b32 Datasheet - Page 13

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m35b32

Manufacturer Part Number
m35b32
Description
32 Kbit, 256-byte Page, Fast Program Eeprom Memory Accessed By Spi Bus Interface
Manufacturer
STMicroelectronics
Datasheet
M35B32
4.4
Protection modes
The environments where non-volatile memory devices are used can be very noisy. No SPI
device can operate correctly in the presence of excessive noise. To help combat this, the
M35B32 features the following data protection mechanisms:
Power on reset can provide protection against inadvertent changes while the power
supply is outside the operating specification.
Program, Erase and Write instructions are checked that they consist of a number of
clock pulses that is a multiple of eight, before they are accepted for execution.
All instructions that modify data must be preceded by a Write Enable (WREN)
instruction to set the WEL bit (in the status register). This bit is returned to its reset
state by the following events:
The Hardware Protected mode is entered when Write Protect (W) is driven low, causing
the Event sector to become read-only. When Write Protect (W) is driven high, the 4
Kbytes of EEPROM memory can be accessed in Read and Write mode.
The Reset (RESET) signal can be driven low to protect the contents of the memory
during any critical time, not just during Power-up and Power-down. When driven active
(low), the RESET pin does not stop an on going Program or Write cycle.
Power-up
Reset (RESET) driven low
Write Disable (WRDI) instruction completion
Page Write (PW) instruction completion
Page Program (PP) instruction completion
Page Erase (PE) instruction completion
Sector Erase (SE) instruction completion
Doc ID 18391 Rev 3
Operating features
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