m35b32 STMicroelectronics, m35b32 Datasheet - Page 19

• Manufacturer Part Number: m35b32
• Description: 32 Kbit, 256-byte Page, Fast Program Eeprom Memory Accessed By Spi Bus Interface
• Manufacturer: STMicroelectronics

M35B32
6.4
6.4.1
6.4.2
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The
Status Register may be read at any time, even while a Program, Erase or Write cycle is in
progress. When one of these cycles is in progress, it is recommended to check the Write In
Progress (WIP) bit before sending a new instruction to the device. It is also possible to read
the Status Register continuously, as shown in
The value read by the RDSR instruction depends on the logical signal applied on the W
input pin:
●
●
The status bits of the Status Register are as follows:
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write, Program
or Erase cycle. When set to 1, such a cycle is in progress, when reset to 0 no such cycle is
in progress.
WEL bit
The WEL bit is set to 1 after decoding a WREN instruction. When the WEL bit is set to 1, a
Write, Program or Erase instruction is executed; when set to 0, a Write, Program or Erase
instruction is not executed.
The WEL bit is reset to 0 after the completion of a Write, Program or Erase instruction,
unless when /W is driven low when addressing the Event sector (see table4).
Table 4.
1. N is defined with BPi bits and (0 < N < 15): Page = 256 bytes.
1. WEL and WIP are volatile read-only bits (WEL is set and reset by specific instructions; WIP is
Data sector: (16-N) pages
Event sector: N pages
automatically set and reset by the internal logic of the device).
b7
if W=0: Status Register = [0, 0, 0, 0, 0, 0, WEL, WIP]
if W=1: Status Register = [0, 0, BP3, BP2, BP1, BP0, WEL, WIP]
0
Targeted M35B32 sector
Value of the WEL bit after decoding a Page Write, Page Program, Page
Erase or Sector Erase instruction
b6
0
(1)
(1)
BP3
b5
Doc ID 18391 Rev 3
BP2
b4
WEL is reset to 0
WEL is not reset
EEPROM bits
Figure
W input = 0
BP1
b3
10.
BP0
b2
WEL is reset to 0
WEL
b1
W input = 1
(1)
RAM bits
Instructions
WIP
b0
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(1)