CM6802A CHAMP [Champion Microelectronic Corp.], CM6802A Datasheet - Page 15

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CM6802A

Manufacturer Part Number
CM6802A
Description
EPA/80++ ZVS-Like PFC/PWM COMBO CONTROLLER
Manufacturer
CHAMP [Champion Microelectronic Corp.]
Datasheet

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Dynamic Soft PFC (patent pending)
is the main feature of CM6802A/B/AH/BH. Dynamic Soft PFC
is to improve the efficiency, to reduce power device stress, to
ease EMI, and to ease the monotonic output design while it
has the more protection such as the short circuit with power
fold back protection. Its unique sequential control maximizes
the performance and the protections among steady state,
transient and the power on/off conditions.
PFC Section:
Gain Modulator
CM6802A/B/AH/BH. The gain modulator is the heart of the
PFC, as it is this circuit block which controls the response of
the current loop to line voltage waveform and frequency, rms
line voltage, and PFC output voltages. There are three inputs
to the gain modulator. These are:
1. A current representing the instantaneous input voltage
2. A voltage proportional to the long-term RMS AC line
3. The output of the voltage error amplifier, VEAO. The gain
form of a full wave rectified sinusoid at twice the line
frequency. This current is applied to the virtual-ground
(negative) input of the current error amplifier. In this way the
gain modulator forms the reference for the current error loop,
and ultimately controls the instantaneous current draw of the
PFC from the power line. The general formula of the output of
the gain modulator is:
2009/11/02
Besides all the goodies from CM6800A, Dynamic Soft PFC
Figure 1 shows a block diagram of the PFC section of the
The output of the gain modulator is a current signal, in the
(amplitude and wave-shape) to the PFC. The rectified AC
input sine wave is converted to a proportional current via a
resistor and is then fed into the gain modulator at I
Sampling current in this way minimizes ground noise, as is
required in high power switching power conversion
environments. The gain modulator responds linearly to this
current.
voltage, derived from the rectified line voltage after scaling
and filtering. This signal is presented to the gain modulator
at VRMS. The gain modulator’s output is inversely
proportional to V
V
power dissipation of the circuit components under heavy
brownout conditions). The relationship between V
gain is called K, and is illustrated in the Typical
Performance Characteristics.
modulator responds linearly to variations in this voltage.
RMS
I
mul
where special gain contouring takes over, to limit
=
I
AC
( ×
Rev. 1.4
VEAO
RMS
V
RMS
2
(except at unusually low values of
Design for High Efficient Power Supply at both Full Load and Light Load
2
-
0.7V)
x constant
CM6802A/B/AH/BH
Champion Microelectronic Corporation
EPA/80++ ZVS-Like PFC/PWM COMBO CONTROLLER
(1)
RMS
and
AC
.
Where K is in units of [V
around 100
modulator is limited to 100uA x 7.75K=~0.8V. This 0.8V also will
determine the maximum input power.
I
VEAO is less than 0.5V and I
around 33uA.
IAC=20uA, Veao=6V
design 85VAC with VRMS average voltage=1.125V.
Selecting R
mirror input and it requires current input. By selecting a proper
resistor R
from the line voltage and it also helps program the maximum
input power and minimum input line voltage.
R
voltage is 85VAC, the R
ohm.
SENSE
AC
IAC pin is the input of the gain modulator. IAC also is a current
Note that the output current of the gain modulator is limited
However, I
When VRMS below 1V, the PFC is shut off. Designer needs to
=Vin min peak x 39.09K. For example, if the minimum line
= I
Gain
GAINMOD
AC
μ
AC
, it will provide a good sine wave current derived
GAINMOD
(Dynamic Soft PFC/Green PWM)
=
A and the maximum output voltage of the gain
for IAC pin
-I
I
I
OFFSET
mul
SENSE
= K x (VEAO – 0.7V) x I
Gain vs. VRMS (pin4)
K=Gain/(VEAO-0.7V)
cannot be measured directly from I
-1
I
and I
Gain=Imul/Iac
]
AC
AC
I
=85 x 1.414 x 39.09K = 4.7 Mega
OFFSET
OFFSET
GAINMOD
can only be measured when
=
I
I
is 0A. Typical I
MUL
AC
AC
OFFSET
15
SENSE
is
.

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