16C6N4 RENESAS [Renesas Technology Corp], 16C6N4 Datasheet - Page 49

• Manufacturer Part Number: 16C6N4
• Description: Renesas MCU
• Manufacturer: RENESAS [Renesas Technology Corp]

M16C/6N Group (M16C/6N4)
Rev.2.40
REJ03B0003-02400
Under development
This document is under development and its contents are subject to change.
Figure 5.8 Timing Diagram (6)
Memory Expansion Mode and Microprocessor Mode
(For 3-wait setting and external area access)
Read timing
Write timing
Measuring conditions :
Aug 25, 2006
tcyc =
BCLK
ALE
RD
BCLK
ALE
WR, WRL
WRH
CSi
BHE
DBi
CSi
BHE
DBi
ADi
ADi
VCC = 5 V
Input timing voltage : V
Output timing voltage : V
f(BCLK)
1
t
25ns.max
d(BCLK-ALE)
t
25ns.max
d(BCLK-ALE)
Hi-Z
page 49 of 88
t
25ns.max
t
25ns.max
t
25ns.max
t
25ns.max
d(BCLK-CS)
d(BCLK-CS)
d(BCLK-AD)
d(BCLK-AD)
tcyc
tcyc
Hi-Z
t
-4ns.min
t
-4ns.min
h(BCLK-ALE)
h(BCLK-ALE)
t
25ns.max
d(BCLK-RD)
IL
OL
= 0.8 V, V
= 0.4 V, V
t
40ns.max
t
25ns.max
d(BCLK-DB)
d(BCLK-WR)
IH
OH
= 2.0 V
t
(2.5 ✕ tcyc-40)ns.min
d(DB-WR)
= 2.4 V
(3.5 ✕ tcyc-45)ns.max
t
ac2(RD-DB)
t
SU(DB-RD)
40ns.min
t
(0.5 ✕ tcyc-10)ns.min
h(WR-AD)
t
(0.5 ✕ tcyc-10)ns.min
h(WR-DB)
t
0ns.min
h(BCLK-WR)
5. Electric Characteristics (T/V-ver.)
t
4ns.min
t
4ns.min
h(BCLK-DB)
h(BCLK-AD)
t
4ns.min
t
0ns.min
t
4ns.min
t
4ns.min
t
0ns.min
h(BCLK-CS)
h(RD-DB)
h(BCLK-CS)
h(BCLK-AD)
h(BCLK-RD)
t
0ns.min
h(RD-AD)
VCC = 5 V