IDT72V36100 IDT [Integrated Device Technology], IDT72V36100 Datasheet - Page 13

• Manufacturer Part Number: IDT72V36100
• Manufacturer: IDT [Integrated Device Technology]

IDT72V3640/50/60/70/80/90/110 3.3V HIGH DENSITY SUPERSYNC II
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36, 65,536 x 36, 131,072 x 36
D/Q17
D/Q35
D/Q35
1st Parallel Offset Write/Read Cycle
D/Q17
2nd Parallel Offset Write/Read Cycle
D/Q16
16
D/Q16
IDT72V3640/50/60/70/80/90/100
16
16
15
16
15
IDT72V3640/50/60/70/80/90/100/110
14
15
D/Q19
D/Q19
EMPTY OFFSET (LSB) REGISTER (PAE)
15
14
14
13
FULL OFFSET (LSB) REGISTER (PAF)
17
17
13
14
D/Q17
13
12
D/Q17
13
12
Data Inputs/Outputs
1st Parallel Offset Write/Read Cycle
2nd Parallel Offset Write/Read Cycle
11
12
17
16
17
16
Data Inputs/Outputs
12
11
EMPTY OFFSET REGISTER (PAE)
11
10
15
FULL OFFSET REGISTER (PAF)
16
16
15
10
11
10
15
14
9
14
15
10
D/Q8
9
14
13
14
13
9
D/Q8
9
13
12
13
12
8
8
8
8
12
11
11
7
12
7
Figure 3. Programmable Flag Offset Programming Sequence (Continued)
7
7
11
10
6
6
11
10
# of Bits Used
6
6
10
5
5
10
9
9
D/Q8
5
5
D/Q8
4
4
9
9
4
4
3
3
8
8
8
8
3
3
2
2
7
7
7
7
x18 Bus Width
# of Bits Used
# of Bits Used
D/Q0
2
2
1
1
6
6
6
6
D/Q0
1
1
5
5
5
5
Interspersed
Parity
Non-Interspersed
Parity
4
x36 Bus Width
4
4
4
3
3
3
3
2
2
2
2
D/Q0
D/Q0
1
1
1
1
TM
36-BIT FIFO
Non-Interspersed
Parity
Non-Interspersed
Parity
Interspersed
Parity
Interspersed
Parity
13
D/Q17
D/Q17 D/Q16
D/Q17
D/Q17 D/Q16
1st Parallel Offset Write/Read Cycle
3rd Parallel Offset Write/Read Cycle
2nd Parallel Offset Write/Read Cycle
4th Parallel Offset Write/Read Cycle
D/Q16
D/Q16
16
16
15
16
15
16
14
14
15
15
EMPTY OFFSET (LSB) REGISTER (PAE)
FULL OFFSET (LSB) REGISTER (PAF)
FULL OFFSET (MSB) REGISTER (PAF)
EMPTY OFFSET (MSB) REGISTER (PAE)
14
14
13
13
13
12
IDT72V36110
13
12
Data Inputs/Outputs
Data Inputs/Outputs
Data Inputs/Outputs
Data Inputs/Outputs
11
11
12
12
11
10
11
10
10
10
9
9
D/Q8
D/Q8
# of Bits Used:
10 bits for the IDT72V3640
11 bits for the IDT72V3650
12 bits for the IDT72V3660
13 bits for the IDT72V3670
14 bits for the IDT72V3680
15 bits for the IDT72V3690
16 bits for the IDT72V36100
17 bits for the IDT72V36110
Note: All unused bits of the
LSB & MSB are don’t care
9
9
8
8
8
8
7
7
7
7
COMMERCIAL AND INDUSTRIAL
6
6
6
6
x18 Bus Width
# of Bits Used
5
5
5
5
4
4
4
4
TEMPERATURE RANGES
3
3
3
3
2
2
2
2
D/Q0
D/Q0
D/Q0
D/Q0
17
17
17
17
1
1
1
1
Interspersed
Parity
Non-Interspersed
Parity
4667 drw 07